| Resume alert | Resumes 51 - 60 of 67 |
High School Project
Pune, MH, India
... -Strong hardware knowledge of VHDL and Verilog. -Excellent knowledge of assembly languages Microprocessor 8086 and Microcontroller 8051. Tools and Libraries -Visual Studio. -Xilinx IDE. -Micro wind -GNU Scientific Library Project- Automatic Energy ... - 2013 Oct 03
... -Strong hardware knowledge of VHDL and Verilog. -Excellent knowledge of assembly languages Microprocessor 8086 and Microcontroller 8051. Tools and Libraries -Visual Studio. -Xilinx IDE. -Micro wind -GNU Scientific Library Project- Automatic Energy ... - 2013 Oct 03
Engineer Design
Pune, MH, India
... Xilinx, Matlab, C, C++, Embedded C, VHDL, Verilog HDL . Microprocessor (8051) & Microcontroller (8086) . Windows 8, 7, Vista, XP PROFESSIONAL EXPERIENCE Shridevi Institute of Engineering & Technology - Tumkur, Karnataka,2009- 2013 . Undergone ... - 2013 Sep 09
... Xilinx, Matlab, C, C++, Embedded C, VHDL, Verilog HDL . Microprocessor (8051) & Microcontroller (8086) . Windows 8, 7, Vista, XP PROFESSIONAL EXPERIENCE Shridevi Institute of Engineering & Technology - Tumkur, Karnataka,2009- 2013 . Undergone ... - 2013 Sep 09
Fresher perceiving CCNA & MCITP. Interest:network engg.
Pune, MH, India
... • Software : MATLAB, XILINX, Keil, Cadence_DB, MULTISIM • Hardware Description :Verilog, VHDL. • Language • Operating Systems : Windows XP/7. • Software : MS Excel, MS Word, MS PowerPoint. Educational Qualification: Class Year Marks University/Board ... - 2013 Aug 28
... • Software : MATLAB, XILINX, Keil, Cadence_DB, MULTISIM • Hardware Description :Verilog, VHDL. • Language • Operating Systems : Windows XP/7. • Software : MS Excel, MS Word, MS PowerPoint. Educational Qualification: Class Year Marks University/Board ... - 2013 Aug 28
Management Objective
Pune, MH, 411014, India
... • Programming: Assembly Language programming on Microcontroller & Microprocessors, HDL(VHDL/VERILOG). • Microsoft Office: Word, Excel, Power Point. • Operating Systems: Windows XP, VISTA and Windows 7. ACADEMIC PROJECTS • RFID Based attendance ... - 2013 Aug 05
... • Programming: Assembly Language programming on Microcontroller & Microprocessors, HDL(VHDL/VERILOG). • Microsoft Office: Word, Excel, Power Point. • Operating Systems: Windows XP, VISTA and Windows 7. ACADEMIC PROJECTS • RFID Based attendance ... - 2013 Aug 05
harshi_gupta_m.tech_VLSI_design
Pune, MH, 411038, India
... Dexterous at RTL coding using Verilog and Test benches in System Verilog and possess the domain of ASIC, FPGA design flow and Digital Design methodologies, PLL, MOS physics, op- amp. . Possess sound Analytical, Quantitative Research and Problem ... - 2013 Jun 24
... Dexterous at RTL coding using Verilog and Test benches in System Verilog and possess the domain of ASIC, FPGA design flow and Digital Design methodologies, PLL, MOS physics, op- amp. . Possess sound Analytical, Quantitative Research and Problem ... - 2013 Jun 24
B.E (E&TC ), PG-Diploma ( Integrated vlsi & embedded system design.)
Pune, MH, 414005, India
... VERILOG. VHDL. COMPUTER KNOWLEDGE OPENSUSE LINUX, WINDOWS. EMBEDDED LINUX. ACADEMIC QUALIFICATION Education School/College UNIVERSITYBO YEAR OF SCORE ARD PASSING CDAC (PG-Diploma in Sunbeam institute of information CDAC 2013 A+ (In Integrated vlsi ... - 2013 May 22
... VERILOG. VHDL. COMPUTER KNOWLEDGE OPENSUSE LINUX, WINDOWS. EMBEDDED LINUX. ACADEMIC QUALIFICATION Education School/College UNIVERSITYBO YEAR OF SCORE ARD PASSING CDAC (PG-Diploma in Sunbeam institute of information CDAC 2013 A+ (In Integrated vlsi ... - 2013 May 22
Design Project
Pune, MH, India
... EDUCATIONAL QUALIFICATION Technical Knowledge Good understanding of the ASIC and FPGA design flow Experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog Experience in using industry standard EDA tools for the front-end ... - 2013 Apr 26
... EDUCATIONAL QUALIFICATION Technical Knowledge Good understanding of the ASIC and FPGA design flow Experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog Experience in using industry standard EDA tools for the front-end ... - 2013 Apr 26
M.TECH in VLSI Design
Pune, MH, 411034, India
... Programming Languages: VHDL, Verilog, Embedded-C, Assembly. . Engineering Software's: Keil vivision-3, Xilinx 12.3ise ProjectNavigator, Xilinx 12.3ise PlanAhead, ModelSim. . Date of Birth: Feb 04th, 1987. . Marital Status: Single. . Nationality: ... - 2013 Jan 08
... Programming Languages: VHDL, Verilog, Embedded-C, Assembly. . Engineering Software's: Keil vivision-3, Xilinx 12.3ise ProjectNavigator, Xilinx 12.3ise PlanAhead, ModelSim. . Date of Birth: Feb 04th, 1987. . Marital Status: Single. . Nationality: ... - 2013 Jan 08
Design Engineer
Pune, MH, 411021, India
... As Hardware Architect & VLSI Front End Design, posses technical background and know-how in leading development of high-performance and low-power multi-processor SoCs, using system tools and languages like VHDL, Verilog, C, Assembly language. ... - 2012 Nov 20
... As Hardware Architect & VLSI Front End Design, posses technical background and know-how in leading development of high-performance and low-power multi-processor SoCs, using system tools and languages like VHDL, Verilog, C, Assembly language. ... - 2012 Nov 20
Project Training
Pune, MH, India
... PLATFORM:- Verilog B.TECH PROJECT: ● “DTMF Based Remote Control” using mobile phone. DESCRIPTION:- Controlling & switching of a vehicle through mobile phone. SKILLS Languages : System Verilog, VHDL, Verilog, C, C++ Platform : Linux (basic) Windows ... - 2012 Aug 20
... PLATFORM:- Verilog B.TECH PROJECT: ● “DTMF Based Remote Control” using mobile phone. DESCRIPTION:- Controlling & switching of a vehicle through mobile phone. SKILLS Languages : System Verilog, VHDL, Verilog, C, C++ Platform : Linux (basic) Windows ... - 2012 Aug 20