| Resume alert | Resumes 31 - 40 of 67 |
ASIC verification: VHDL, Verilog
Pune, MH, India
Pooja Sabale Phone: +91-976******* Email: acsjia@r.postjobfree.com Objective To explore the professional environment by utilizing the skills gained during my academic session through character, commitment, discipline and loyalty to grow up with the... - 2015 Nov 21
Pooja Sabale Phone: +91-976******* Email: acsjia@r.postjobfree.com Objective To explore the professional environment by utilizing the skills gained during my academic session through character, commitment, discipline and loyalty to grow up with the... - 2015 Nov 21
ASIC Design and Verification Trainee
Pune, MH, India
... Verilog design – SPI, FIFO SV Environment – SPI, I2C UVM Environment – I2C, APB Technical Summary: HDL : VHDL, Verilog HDL, System Verilog and UVM Protocols Known : AMBA AXI, AHB, APB, SPI, I2C and Basics of DDR Software : Questa-sim, Xilinx, ... - 2015 Oct 23
... Verilog design – SPI, FIFO SV Environment – SPI, I2C UVM Environment – I2C, APB Technical Summary: HDL : VHDL, Verilog HDL, System Verilog and UVM Protocols Known : AMBA AXI, AHB, APB, SPI, I2C and Basics of DDR Software : Questa-sim, Xilinx, ... - 2015 Oct 23
Project Design
Pune, MH, India
... 0 First X SSC 2006 BBMB DAV Public School, Nangal(Pb) CBSE 87.2 First Technical Proficiency Hardware Description Languages Verilog,VHDL Simulation Tools ModelSim, Xilinx Isim Synthesis Tools Xilinx Synthesis Tool (XST) Design Platform Tools Cadence ... - 2015 Aug 25
... 0 First X SSC 2006 BBMB DAV Public School, Nangal(Pb) CBSE 87.2 First Technical Proficiency Hardware Description Languages Verilog,VHDL Simulation Tools ModelSim, Xilinx Isim Synthesis Tools Xilinx Synthesis Tool (XST) Design Platform Tools Cadence ... - 2015 Aug 25
Project Security
Pune, MH, India
... TECHNICAL SKILLS •Programming Languages: C, Assembly, VHDL, MATLAB,Verilog . •Simulation Tools : Multisim, Microwind, Modelsim, Labview, NS2. •PCB designing CO-CIRCULAR ACTIVITY •Line tracer in MCOE •RACEROBO in PVG, MCOE. •Participated in Technical ... - 2015 Aug 07
... TECHNICAL SKILLS •Programming Languages: C, Assembly, VHDL, MATLAB,Verilog . •Simulation Tools : Multisim, Microwind, Modelsim, Labview, NS2. •PCB designing CO-CIRCULAR ACTIVITY •Line tracer in MCOE •RACEROBO in PVG, MCOE. •Participated in Technical ... - 2015 Aug 07
Design Tech
Pune, MH, India
... busstand Chanpatna Ph - 948-***-**** Hassan-573201 Qualification: M.tech(persuing) VLSI Design and Embedded systems RIT, Hassan Interest : Analog design, Physical VLSI Design, ASIC, verilog Aggregate in B.E (ECE) - 77% Result of 1st sem M.tech - 76% - 2015 Jul 14
... busstand Chanpatna Ph - 948-***-**** Hassan-573201 Qualification: M.tech(persuing) VLSI Design and Embedded systems RIT, Hassan Interest : Analog design, Physical VLSI Design, ASIC, verilog Aggregate in B.E (ECE) - 77% Result of 1st sem M.tech - 76% - 2015 Jul 14
Engineering Design
Pune, MH, India
... junior college, Hyderabad Percentage: 87.2% Secondary Education Keshava reddy talent school, Kurnool Percentage: 88% TECHNICAL EXPERTISE Languages: C-language basics, perl basics,linux shell scripting,programming with ATmega16,, VHDL,verilog. ... - 2015 Jun 22
... junior college, Hyderabad Percentage: 87.2% Secondary Education Keshava reddy talent school, Kurnool Percentage: 88% TECHNICAL EXPERTISE Languages: C-language basics, perl basics,linux shell scripting,programming with ATmega16,, VHDL,verilog. ... - 2015 Jun 22
Design Assistant
Pune, MH, India
... TECHNICAL PROFICIENCY HDL & PROGRAMMING LANGUAGES Verilog, C. OPERATING SYSTEMS MS-DOS, Windows variants, Linux/Unix variants. TOOLS AND TECHNOLOGIES MATLAB, Advanced Design System. Xilinx, Cadence(Virtuoso), Mentor graphics (Eldo). POSITIONSOF ... - 2015 Apr 16
... TECHNICAL PROFICIENCY HDL & PROGRAMMING LANGUAGES Verilog, C. OPERATING SYSTEMS MS-DOS, Windows variants, Linux/Unix variants. TOOLS AND TECHNOLOGIES MATLAB, Advanced Design System. Xilinx, Cadence(Virtuoso), Mentor graphics (Eldo). POSITIONSOF ... - 2015 Apr 16
Design Project
Pune, MH, India
... Design of vga controller using verilog HDL(virtex 4) Custom design using cadence: Circuit design,Simulation,Layout design and testing of standard cells o Design of adder using 28,32 and 14 transistors. o Area of Interest Digital design RTL coding ... - 2015 Apr 13
... Design of vga controller using verilog HDL(virtex 4) Custom design using cadence: Circuit design,Simulation,Layout design and testing of standard cells o Design of adder using 28,32 and 14 transistors. o Area of Interest Digital design RTL coding ... - 2015 Apr 13
VHDL, Verilog, c, c++, digital design
Pune, MH, India
... FPGA Vertex 4, Vertex 6 Xilinx, Questasim, Emacs, Kiel, Proteus, MS Tools, Utilities Office, virtual machine workstation VHDL, Verilog, C, C++, HTML, PHP Languages Xilinx Platform Studio, Vivado Design Suite, Plan Basic Knowledge of Ahead Design and ... - 2015 Feb 20
... FPGA Vertex 4, Vertex 6 Xilinx, Questasim, Emacs, Kiel, Proteus, MS Tools, Utilities Office, virtual machine workstation VHDL, Verilog, C, C++, HTML, PHP Languages Xilinx Platform Studio, Vivado Design Suite, Plan Basic Knowledge of Ahead Design and ... - 2015 Feb 20
vlsi, electronics,communication
Pune, MH, India
... ROLE: Developer TEAM SIZE: 4 TECHNICAL SKILLS Language Skills: C, VERILOG,VHDL Software Skills: XILINX,CADENCE(Virtuoso),TANNER TOOL Areas of Interest : Communication system, Signals System,Digtal Electronics, Electronics devices And Circuits. ... - 2015 Jan 31
... ROLE: Developer TEAM SIZE: 4 TECHNICAL SKILLS Language Skills: C, VERILOG,VHDL Software Skills: XILINX,CADENCE(Virtuoso),TANNER TOOL Areas of Interest : Communication system, Signals System,Digtal Electronics, Electronics devices And Circuits. ... - 2015 Jan 31