| Resume alert | Resumes 11 - 20 of 67 |
Engineer Engineering
Pune, Maharashtra, India
... • Programming Languages - C,VHDL and Verilog Programming. • IDE Tools -Winavr, Atmel studio, Kiel • Platforms- Arduino, Nuvoton Board. • Protocols - Zigbee, Bluetooth, GSM, SPI,UART,I2C. • Component Engineering - Core Competency : ● Good Knowledge ... - 2021 Feb 11
... • Programming Languages - C,VHDL and Verilog Programming. • IDE Tools -Winavr, Atmel studio, Kiel • Platforms- Arduino, Nuvoton Board. • Protocols - Zigbee, Bluetooth, GSM, SPI,UART,I2C. • Component Engineering - Core Competency : ● Good Knowledge ... - 2021 Feb 11
Engineer Design
Pune, Maharashtra, India
... • Basics of shell script programming HDL: • Verilog Verification Language: • Sound Knowledge System Verilog(SV) • Basic Knowledge of UVM Operating Systems: • Windows • Linux Tools Known: • For Simulation: o ModelSim -Intel FPGA starter Edition 10.5c ... - 2021 Feb 08
... • Basics of shell script programming HDL: • Verilog Verification Language: • Sound Knowledge System Verilog(SV) • Basic Knowledge of UVM Operating Systems: • Windows • Linux Tools Known: • For Simulation: o ModelSim -Intel FPGA starter Edition 10.5c ... - 2021 Feb 08
Engineering Design
Pune, Maharashtra, India
VIDHYACHARAN B WATHORE adi0op@r.postjobfree.com 787-***-**** AT.PO.BRAHMANGAON TAH UMARKHED DIST YAVATMAL PIN CODE:445206 Vidhyacharan wathore vidhyacharan52 Skills HDLs :VHDL, Verilog, System- Verilog, FPGA,Tanner EDA Tools:Software Modelsim, ... - 2020 Dec 29
VIDHYACHARAN B WATHORE adi0op@r.postjobfree.com 787-***-**** AT.PO.BRAHMANGAON TAH UMARKHED DIST YAVATMAL PIN CODE:445206 Vidhyacharan wathore vidhyacharan52 Skills HDLs :VHDL, Verilog, System- Verilog, FPGA,Tanner EDA Tools:Software Modelsim, ... - 2020 Dec 29
Student
Pune, Maharashtra, India
... BOARD YEAR OF PASSING PERCENTAGE /POINTER B.Tech (Electronics and Telecommunication Engineering) Vishwakarma Institute of InformationTechnology S.P.P.U 2021 8.3 TECHNICAL SKILLS: • PROGRAMMING LANGUAGE AND HDL:JAVA,SQL,(Basics of C),Verilog. ... - 2020 Nov 29
... BOARD YEAR OF PASSING PERCENTAGE /POINTER B.Tech (Electronics and Telecommunication Engineering) Vishwakarma Institute of InformationTechnology S.P.P.U 2021 8.3 TECHNICAL SKILLS: • PROGRAMMING LANGUAGE AND HDL:JAVA,SQL,(Basics of C),Verilog. ... - 2020 Nov 29
Design Engineer Power
Pune, Maharashtra, India
... Technical Experties: HDL Languages : Verilog, VHDL RTL Entry & Synthesis Tool : Synopsys Design Compiler, Cadence RTL Compiler. Frontend EDA Tools : SpyGlass LINT, SpyGlass CDC, Questa CDC, Synopsys Formality, Synopsys Prime Time. Backend Tool : ... - 2020 Nov 04
... Technical Experties: HDL Languages : Verilog, VHDL RTL Entry & Synthesis Tool : Synopsys Design Compiler, Cadence RTL Compiler. Frontend EDA Tools : SpyGlass LINT, SpyGlass CDC, Questa CDC, Synopsys Formality, Synopsys Prime Time. Backend Tool : ... - 2020 Nov 04
Verilog, FPGA design, Cadence Virtuoso, C language, Embedded C
Pune, Maharashtra, India
... Advance Verification Techniques using System Verilog 2. Real-time OS 3. Analog Mix Signal VLSI 4. Low Power CMOS IC Design 5. Modern Digital Design Using Verilog 6. Digital Integrated Circuit Design 7. Embedded System Design 8. Microelectronics 9. ... - 2019 Dec 21
... Advance Verification Techniques using System Verilog 2. Real-time OS 3. Analog Mix Signal VLSI 4. Low Power CMOS IC Design 5. Modern Digital Design Using Verilog 6. Digital Integrated Circuit Design 7. Embedded System Design 8. Microelectronics 9. ... - 2019 Dec 21
Engineering Project
Pune, Maharashtra, India
... Workshops & Trainings Attended 2 days of workshop hands on with VLSI design and Industry Applications of Verilog in SGI. Attended 2 days of workshop hands on with Arduino and Proteus in Govt. Polytechnic, Kolhapur. Completed online “Embedded Systems ... - 2019 Nov 09
... Workshops & Trainings Attended 2 days of workshop hands on with VLSI design and Industry Applications of Verilog in SGI. Attended 2 days of workshop hands on with Arduino and Proteus in Govt. Polytechnic, Kolhapur. Completed online “Embedded Systems ... - 2019 Nov 09
Python Engineering
Pune, Maharashtra, India
... Implementation has been done in Verilog HDL using Modelsim and Xilinx ISE. • Android application on museum guide using RFID interface. Developed a museum guide and an android application using Eclipse and other tools. •Website development for Online ... - 2019 Sep 20
... Implementation has been done in Verilog HDL using Modelsim and Xilinx ISE. • Android application on museum guide using RFID interface. Developed a museum guide and an android application using Eclipse and other tools. •Website development for Online ... - 2019 Sep 20
Engineering Education
Pune, Maharashtra, India
... VIJAYAPUR DEPARTMENT OF TECHNICAL EDUCATION BANGALORE 2015 77.28 SSLC IQRA URDU HIGH SCHOOL,VIJAYAPUR KARNATAKA SECONDRY EDUCATION EXAMINATION BOARD 2012 72.32 Technical Skill Programming languages: C, Microcontroller, Vhdl, Verilog, Matlab. ... - 2018 Oct 27
... VIJAYAPUR DEPARTMENT OF TECHNICAL EDUCATION BANGALORE 2015 77.28 SSLC IQRA URDU HIGH SCHOOL,VIJAYAPUR KARNATAKA SECONDRY EDUCATION EXAMINATION BOARD 2012 72.32 Technical Skill Programming languages: C, Microcontroller, Vhdl, Verilog, Matlab. ... - 2018 Oct 27
Social Media Project
Pune, Maharashtra, India
... SKILLS: Having basic knowledge of C, C++ programming Proficient in embedded programming on microcontrollers Familiar with Verilog(Xilinx ISE) and MATLAB programming Completed Primer training program on LABVIEW CO - CURRICULAR ACTIVITIES: Submitted a ... - 2018 Oct 14
... SKILLS: Having basic knowledge of C, C++ programming Proficient in embedded programming on microcontrollers Familiar with Verilog(Xilinx ISE) and MATLAB programming Completed Primer training program on LABVIEW CO - CURRICULAR ACTIVITIES: Submitted a ... - 2018 Oct 14