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M.TECH in VLSI Design

Location:
Pune, MH, 411034, India
Posted:
January 08, 2013

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Resume:

CURRICULUM VITAE

MANE.GAURAV.MANGESH

ablev1@r.postjobfree.com

M.TECH in VLSI Design from

VIT University, Vellore, Tamil Nadu

B.E Instrumentation

Mobile: +91-823*******

To convert opportunity into success, achieving excellence through hard

work and try to do best and help others to get their best.

. 9+ months of experience with Kirloskar Oil Engine Ltd. as Application

Engineering Trainee in Application Department (Electrical &

Electronics').

. MTECH Micro-electronics Design

Vellore, India

VIT University, Vellore, Tamil Nadu

2010 -2012

- Final Year CGPA-7.84 /10

. B.E. Instrumentation Engineering (University Of Pune)

Pune, India

Dr. D.Y. Patil Institute of Engg & Technology, Pune.

2005-2009

- Percentage Marks: 66.96

. H.S.C.( Science) Pune,

India

Dr.D.Y.Patil College of Science & Commerce

2003-2005

- Maharashtra Board

- Percentage Marks: 65.33

. S.S.C. Pune,

India

Judson High School.

2002-2003.

- Pune Board

- Percentage Marks: 70.40

. MTECH Project- Implementation of Multi-mode OFDM transmitter using

Partial- Reconfiguration on FPGA Platform.

. Team Size-One.

. Role- Programmer.

. Programming Language- VHDL.

. Tools and Language- Xilinx12.3ise-ProjectNavigator, Xilinx12.3ise-

PlanAhead, ModelSim.

. Overview- Implementation of Multi-mode OFDM transmitter on same FPGA

due to advantage of reconfiguration possible in FPGA. Design consists

of static portion and reconfigurable portion. Partition is created

inside FPGA using Xilinx 12.3 Plan Ahead tool and that partition is

reconfigured based on application configured (ex. 8 point IFFT will

later be configured to 16 point IFFT in same portion).Advantage:

Partial Reconfiguration helps in reducing time taken to configure

FPGA. Secondly useful for reducing power. Other advantage of Partial

Reconfiguration is that it allows user to reconfigure the part of same

FPGA while other application is running on same FPGA.

. B.E Project- Condition Monitoring For Extending Oil Filter Change

Periods

(8-bit Controller based)-GSM Based.

Sponsored by -Kirloskar Oil Engine LTD,

Khadaki, Pune - 03

. Team Size- Two.

. Role- Programmer and Hardware Designer.

. Tools - Keil vision-3.

. Programming Language- Assembly and Embedded-C.

. Overview-: It is based on monitoring pressure drop across oil filter

and informing the user about filter change period through SMS and also

to display the differential pressure on LCD display. Thus helps in

bringing down the maintenances cost of oil filter & increase in life

span of oil filter.Advantage: Since we have used GSM based technology,So it helps user to know about oil filter change period through SMS .

Secondly this technique is useful when system is used

in remote location.

. FPGA Design, Digital Design, Micro-controller, Engine Control Unit

Design and Testing.

. Guided Under Graduate Students for Completing their Final Year

Project.

. Operating Systems: Windows, Linux.

. Programming Languages: VHDL, Verilog, Embedded-C, Assembly.

. Engineering Software's: Keil vivision-3, Xilinx 12.3ise

ProjectNavigator,

Xilinx 12.3ise

PlanAhead, ModelSim.

. Date of Birth: Feb 04th, 1987.

. Marital Status: Single.

. Nationality: Indian.

. Sex: Male.

. Perm. Address:Yash-Laxmi,Bld,Kasarwadi,Pune-411034

. Email: ablev1@r.postjobfree.com

. Languages: English, Hindi, Marathi (mother tongue).

. Skills: Hardworking, Willingness to Learn.

. Hobbies: Traveling, Listening Songs, Playing Computer Games,

Watching Cricket.

I hereby declare that all the information furnished above is true to the

best of knowledge and belief.

Date:

Mane.Gaurav.Mangesh

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