| Resume alert | Resumes 61 - 70 of 681 |
Test Project
Bengaluru, KA, 560001, India
... of a team that dynamically Works towards success and growth of the organization PROFESSIONAL SKILLS: Languages:, System Verilog,Verilog, VHDL, TCL/TK and C •5+ years of experience in Test plan creation, Modeling Test bench and test case coding. ... - 2016 Oct 05
... of a team that dynamically Works towards success and growth of the organization PROFESSIONAL SKILLS: Languages:, System Verilog,Verilog, VHDL, TCL/TK and C •5+ years of experience in Test plan creation, Modeling Test bench and test case coding. ... - 2016 Oct 05
Project Design
Bengaluru, KA, 560001, India
... AREA OF INTEREST SAP, pro E Cadence (Analog & Digital- Verilog & VHDL) Embedded systems Control systems Electrical Motors and circuits ACADEMIC PERFORMANCE Institution Degree Year Percentage/CGPA Government college of technology, cbe VLSI Design ... - 2016 Oct 05
... AREA OF INTEREST SAP, pro E Cadence (Analog & Digital- Verilog & VHDL) Embedded systems Control systems Electrical Motors and circuits ACADEMIC PERFORMANCE Institution Degree Year Percentage/CGPA Government college of technology, cbe VLSI Design ... - 2016 Oct 05
Engineer Design
Bengaluru, KA, 560001, India
... VENU NAIK TECHNICAL SKILLS Electronic Design Packages INCISIVE,INNOVUS,RC,VIRTUOSO,CONFORMAL,VOLTUS,XILINX, QUESTASIM, MODELSIM, Programming Languages VERILOG, SYSTEM-VERILOG, C-PROGRAMING Microcontrollers / FPGA FPGA [XILINX SPARTAN 6,SPARTAN 3E] ... - 2016 Oct 04
... VENU NAIK TECHNICAL SKILLS Electronic Design Packages INCISIVE,INNOVUS,RC,VIRTUOSO,CONFORMAL,VOLTUS,XILINX, QUESTASIM, MODELSIM, Programming Languages VERILOG, SYSTEM-VERILOG, C-PROGRAMING Microcontrollers / FPGA FPGA [XILINX SPARTAN 6,SPARTAN 3E] ... - 2016 Oct 04
Design Project
Bengaluru, KA, 560001, India
... CORE COMPETENCIES: Good knowledge in Verilog HDL, System Verilog and UVM. Good working knowledge of C programming and PERL. Good understanding in fundamentals of Logic design, CMOS design and STA. Good knowledge on AMBA APB and AHB protocol. ... - 2016 Sep 20
... CORE COMPETENCIES: Good knowledge in Verilog HDL, System Verilog and UVM. Good working knowledge of C programming and PERL. Good understanding in fundamentals of Logic design, CMOS design and STA. Good knowledge on AMBA APB and AHB protocol. ... - 2016 Sep 20
Project Design
KA, India
... Science College Marlanhalli, Tq : Gangavati Aggregate : 69.33% 2010 S S L C Karnataka Technical Education Board, Bangalore MNM High school Vidhyagiri.Gangavati Percentage : 75.37% 2008 TECHNICAL SKILLS Programming Languages: Verilog, VHDL, C,Java. ... - 2016 Sep 20
... Science College Marlanhalli, Tq : Gangavati Aggregate : 69.33% 2010 S S L C Karnataka Technical Education Board, Bangalore MNM High school Vidhyagiri.Gangavati Percentage : 75.37% 2008 TECHNICAL SKILLS Programming Languages: Verilog, VHDL, C,Java. ... - 2016 Sep 20
Project High School
Bengaluru, KA, 560001, India
... Education Z.P.High School, Emani 91.3 SKILL SET: EDA Tools : HSPICE, DC Compiler, GTK Wave, MVRC,VCS Hardware Description Languages : Verilog, Basics of System Verilog & UVM ASIC Flow : Logic Design, Synthesis Software Skills : Perl, Python & C. ... - 2016 Sep 20
... Education Z.P.High School, Emani 91.3 SKILL SET: EDA Tools : HSPICE, DC Compiler, GTK Wave, MVRC,VCS Hardware Description Languages : Verilog, Basics of System Verilog & UVM ASIC Flow : Logic Design, Synthesis Software Skills : Perl, Python & C. ... - 2016 Sep 20
Higher Secondary School
Bengaluru, KA, 560100, India
... VHDL, Verilog, SystemVerilog, UVM. Softwares : Tanner, Xilinx-ISE Simulation, Modelsim, Questasim. Protocols : UART, I2C. ACADAMIC PROJECT Implementation Of Cardless Atm Security By Using Iris Recognition And Gsm When a customer enters the ATM, a ... - 2016 Sep 19
... VHDL, Verilog, SystemVerilog, UVM. Softwares : Tanner, Xilinx-ISE Simulation, Modelsim, Questasim. Protocols : UART, I2C. ACADAMIC PROJECT Implementation Of Cardless Atm Security By Using Iris Recognition And Gsm When a customer enters the ATM, a ... - 2016 Sep 19
Engineering Project
Bengaluru, KA, 560001, India
... Basic knowledge in HDL(Verilog) and Embedded language. Basic knowledge in Cadence software and VLSI Flexible attitude to mold into any given situation. Quick learner and excellent team player having ability to meet tight deadlines and work under ... - 2016 Sep 18
... Basic knowledge in HDL(Verilog) and Embedded language. Basic knowledge in Cadence software and VLSI Flexible attitude to mold into any given situation. Quick learner and excellent team player having ability to meet tight deadlines and work under ... - 2016 Sep 18
Design Test Cases
Bengaluru, KA, 560001, India
... SKILLS ASIC Front-end Design and Verification Domain Programming Language C, C++ HDL Verilog HVL System Verilog TB Methodology UVM(Universal Verification Methodology) Verification Coverage Driven Verification, Assertion based verification ... - 2016 Sep 02
... SKILLS ASIC Front-end Design and Verification Domain Programming Language C, C++ HDL Verilog HVL System Verilog TB Methodology UVM(Universal Verification Methodology) Verification Coverage Driven Verification, Assertion based verification ... - 2016 Sep 02
Design Data
Bengaluru, KA, 560001, India
... Technical skills Languages : Verilog HDL,Perl, TCL, C, Shell scripting, Matlab Tools : Cadence Virtuoso, Mentor Graphics Modelsim,Quartus Operating Systems : Windows and Linux Rahul Nair 71/203, Patel Marg Email:acwe11@r.postjobfree.com Mansarovar, ... - 2016 Aug 31
... Technical skills Languages : Verilog HDL,Perl, TCL, C, Shell scripting, Matlab Tools : Cadence Virtuoso, Mentor Graphics Modelsim,Quartus Operating Systems : Windows and Linux Rahul Nair 71/203, Patel Marg Email:acwe11@r.postjobfree.com Mansarovar, ... - 2016 Aug 31