| Resume alert | Resumes 41 - 50 of 681 |
cmos,digital design,layout,verilog,system verilog,oops,shell and perl
Bengaluru, KA, India
... CORE COMPETENCIES Hardware Languages Verilog & System Verilog. Verification Methodology UVM Scripting Languages Shell (TCSH),PERL & PYTHON. Operating Systems Windows & Linux (REDHAT). Others Command Line Interface (CLI), Knowledge in CMOS and ... - 2017 Feb 23
... CORE COMPETENCIES Hardware Languages Verilog & System Verilog. Verification Methodology UVM Scripting Languages Shell (TCSH),PERL & PYTHON. Operating Systems Windows & Linux (REDHAT). Others Command Line Interface (CLI), Knowledge in CMOS and ... - 2017 Feb 23
ASIC Engineer
Bengaluru, KA, 560045, India
... Verilog : Good understanding of sequential and combo logic programming, blocking and non-blocking assignments in Verilog System Verilog : Sound knowledge of System Verilog Assertions and various constructs UVM : I have excellent knowledge and ... - 2017 Feb 17
... Verilog : Good understanding of sequential and combo logic programming, blocking and non-blocking assignments in Verilog System Verilog : Sound knowledge of System Verilog Assertions and various constructs UVM : I have excellent knowledge and ... - 2017 Feb 17
Engineering Project
Bengaluru, KA, 560001, India
... Technical Skills: • Programming Language : C, C++, Assembly Language • Operating Systems : Linux, Windows • Hardware Language : VHDL, Verilog • Microprocessors : 8085, 8086, • Microcontroller : 8051, 89S51 • Verification : System Verilog, UVM ... - 2017 Jan 25
... Technical Skills: • Programming Language : C, C++, Assembly Language • Operating Systems : Linux, Windows • Hardware Language : VHDL, Verilog • Microprocessors : 8085, 8086, • Microcontroller : 8051, 89S51 • Verification : System Verilog, UVM ... - 2017 Jan 25
Design Project
Bengaluru, KA, 560001, India
... SKILLS •HDL’s & HVL’s : Verilog & System Verilog •Scripting Languages : TCL/TK, PERL, SHELL •Methodology : UVM •EDA Tools : Xilinx ISE, ModelSim, QuestaSim,Rivera Pro,Libero IDE •Operating System : Linux and Windows •Hardware Designing : FPGA ... - 2016 Dec 27
... SKILLS •HDL’s & HVL’s : Verilog & System Verilog •Scripting Languages : TCL/TK, PERL, SHELL •Methodology : UVM •EDA Tools : Xilinx ISE, ModelSim, QuestaSim,Rivera Pro,Libero IDE •Operating System : Linux and Windows •Hardware Designing : FPGA ... - 2016 Dec 27
Engineer Project
Bengaluru, KA, 560001, India
... Skill set: Programming languages: Verilog, VHDL, C, Matlab, SystemVerilog. Operating System: Windows 7/ XP/8/10, Linux, Ubuntu. Tools: Cadence, Modelsim (Mentor graphics), Simulink, QuestaSim, Xilinx. Area of Interest: Logic Design, Digital ... - 2016 Dec 23
... Skill set: Programming languages: Verilog, VHDL, C, Matlab, SystemVerilog. Operating System: Windows 7/ XP/8/10, Linux, Ubuntu. Tools: Cadence, Modelsim (Mentor graphics), Simulink, QuestaSim, Xilinx. Area of Interest: Logic Design, Digital ... - 2016 Dec 23
Design Engineer
Bengaluru, KA, 560001, India
... TECHNICAL SKILLS synthesis tools Xilinx ISE 14.4 HDL &HVL Verilog, System Verilog Microcontrollers / FPGA Spartan 6, Spartan 3E. Familiar Protocols I2C,SPI Familiar OS Windows. Area of Interest Digital Electronics,VLSI Design, Area of interest in ... - 2016 Dec 12
... TECHNICAL SKILLS synthesis tools Xilinx ISE 14.4 HDL &HVL Verilog, System Verilog Microcontrollers / FPGA Spartan 6, Spartan 3E. Familiar Protocols I2C,SPI Familiar OS Windows. Area of Interest Digital Electronics,VLSI Design, Area of interest in ... - 2016 Dec 12
Electronics Engineering
Bengaluru, KA, 560001, India
... high school,kaiwar, KSEEB Karnataka 2007 79.04% PROGRAMMING LANGUAGES : C++, verilog, hdl, ALP COMPUTER SKILLS : MS office, MS Excel, MS PowerPoint ACIEVEMENTS : Secured 1st prize in Chinthana Science Examination held in 2006-07 at GJC, Kaiwara. ... - 2016 Dec 04
... high school,kaiwar, KSEEB Karnataka 2007 79.04% PROGRAMMING LANGUAGES : C++, verilog, hdl, ALP COMPUTER SKILLS : MS office, MS Excel, MS PowerPoint ACIEVEMENTS : Secured 1st prize in Chinthana Science Examination held in 2006-07 at GJC, Kaiwara. ... - 2016 Dec 04
Engineer Project
Bengaluru, KA, 560001, India
... Windows 98/XP/7/8/10 & Linux Application package tool – MS office, Eclipse Database Management Systems – My SQL Verilog, VHDL, MATLAB, Proteus 7, μVision IDE (KEIL). Amit Kumar Sinha Page 2 Basics of Raspberry pi, 8051, 8086 and PIC 32. ... - 2016 Nov 30
... Windows 98/XP/7/8/10 & Linux Application package tool – MS office, Eclipse Database Management Systems – My SQL Verilog, VHDL, MATLAB, Proteus 7, μVision IDE (KEIL). Amit Kumar Sinha Page 2 Basics of Raspberry pi, 8051, 8086 and PIC 32. ... - 2016 Nov 30
CCNA Certified Network Engineer at Broadcom Limited
Bengaluru, KA, 560001, India
... (4 th year) Design Turbo Encoder and Decoder using Verilog. - Organization : Alpha College of Engineering & Technology, Ahmedabad. - Duration : 1 year - Tools Used : Xillinx ISE Description: In information theory, turbo codes are a class of high ... - 2016 Nov 29
... (4 th year) Design Turbo Encoder and Decoder using Verilog. - Organization : Alpha College of Engineering & Technology, Ahmedabad. - Duration : 1 year - Tools Used : Xillinx ISE Description: In information theory, turbo codes are a class of high ... - 2016 Nov 29
Project Team Leader
Bengaluru, KA, 560001, India
... Project Details Language Used: Verilog Development Environment : Xilinx 8.2i Description: The main aim of the project is to design FIR Filters based on DA Algorithm. By using this DA algorithm we can reduce the memory size and increase the ... - 2016 Nov 28
... Project Details Language Used: Verilog Development Environment : Xilinx 8.2i Description: The main aim of the project is to design FIR Filters based on DA Algorithm. By using this DA algorithm we can reduce the memory size and increase the ... - 2016 Nov 28