| Distance: | Resume alert | Resumes 51 - 60 of 5966 |
Senior Project Ic Design
Ho Chi Minh City, Vietnam
EDUCATION HONORS AND AWARDS HO VU NGOC TU INTERN CONTACT 036******* **********@****.*** SKILLS Hardware descripstion language: Verilog. Programming Language: C. Can use Cadence Virtuoso, Multisim, Proteus. Proficient in using the Linux operating ... - Jun 22
EDUCATION HONORS AND AWARDS HO VU NGOC TU INTERN CONTACT 036******* **********@****.*** SKILLS Hardware descripstion language: Verilog. Programming Language: C. Can use Cadence Virtuoso, Multisim, Proteus. Proficient in using the Linux operating ... - Jun 22
Electrical Engineering Engineer
Denton, TX, 76201
... Networks, EENG 5940 - Photonics SKILLS MATLAB, PSpice, LT spice, Python, Embedded Chips, PLC, Simulink, C++, Java, Arduino, Verilog, AutoCAD, electrical schematics, electronics troubleshooting, soldering, designing electrical circuits, electrical ... - Jun 21
... Networks, EENG 5940 - Photonics SKILLS MATLAB, PSpice, LT spice, Python, Embedded Chips, PLC, Simulink, C++, Java, Arduino, Verilog, AutoCAD, electrical schematics, electronics troubleshooting, soldering, designing electrical circuits, electrical ... - Jun 21
Hardware Design C++
Ottawa, ON, Canada
... .*** •WWW: https://paulchukwu1.github.io/Skooby/ •WWW: Bold Profile Professional Summary: Engineering student at uOttawa with expertise in hardware design and development, skilled in Python, Java, C, C++, Verilog, System Verilog, VHDL, and Assembly. ... - Jun 20
... .*** •WWW: https://paulchukwu1.github.io/Skooby/ •WWW: Bold Profile Professional Summary: Engineering student at uOttawa with expertise in hardware design and development, skilled in Python, Java, C, C++, Verilog, System Verilog, VHDL, and Assembly. ... - Jun 20
Design Engineer Performance Improvement
Phoenix, AZ
... Introduced HDL-coding+synthesis based digital design using open source tools for quicker and more maintainable digital design and created a verilog import utility (perl + TCL) to generate schematics in Tanner from gate-level verilog netlists. Over ... - Jun 17
... Introduced HDL-coding+synthesis based digital design using open source tools for quicker and more maintainable digital design and created a verilog import utility (perl + TCL) to generate schematics in Tanner from gate-level verilog netlists. Over ... - Jun 17
Electrical Engineering Entry Level
Chandler, AZ
... Power System Analysis TECHNICAL SKILLS Design and Modeling Tools: Cadence, System Verilog, MATLAB, Microsoft Office, AutoCAD Programming: Python, HTML, C++ Other: FPGA ACADEMIC PROJECTS Design and Analysis of Differential to Single Ended Amplifier . ... - Jun 17
... Power System Analysis TECHNICAL SKILLS Design and Modeling Tools: Cadence, System Verilog, MATLAB, Microsoft Office, AutoCAD Programming: Python, HTML, C++ Other: FPGA ACADEMIC PROJECTS Design and Analysis of Differential to Single Ended Amplifier . ... - Jun 17
Customer Service, Software Engineer, Data Engineer
Valparaiso, IN
... & Networking, Intro to AI SKILLS Programming: C / C++, Python (PyTorch, Pandas, Flask), JavaScript, HTML, CSS, Bash, Assembly, Verilog Hardware: Oscilloscope, Multimeter, LTSpice, Soldering, PCB Design (Novice), KiCad, Simulink, SolidWorks Embedded ... - Jun 16
... & Networking, Intro to AI SKILLS Programming: C / C++, Python (PyTorch, Pandas, Flask), JavaScript, HTML, CSS, Bash, Assembly, Verilog Hardware: Oscilloscope, Multimeter, LTSpice, Soldering, PCB Design (Novice), KiCad, Simulink, SolidWorks Embedded ... - Jun 16
Design Engineer Security Clearance
Madison, AL
... Development Synthesis Using Synopsys & Cadence Tools Printed Circuit Board Design Analog Circuit Design Hardware Design Using Verilog & VHDL Universal Verification Methodology (UVM) TECHNICAL SKILLS Tools – Mentor: Questa Prime and Questa AutoFormal ... - Jun 15
... Development Synthesis Using Synopsys & Cadence Tools Printed Circuit Board Design Analog Circuit Design Hardware Design Using Verilog & VHDL Universal Verification Methodology (UVM) TECHNICAL SKILLS Tools – Mentor: Questa Prime and Questa AutoFormal ... - Jun 15
Machine Learning, C++, optimization
Elmhurst, IL
... Programming, Data Structures, Numerical Methods, Non-Linear Programming, Optimization for Stochiastic Learning Skills & Languages Skills: NumPy, NeXpy, ROOT, Pandas, PyTorch, Tensor Flow Languages: Python, Julia, C++, Java, Verilog, Assembly, Qiskit - Jun 15
... Programming, Data Structures, Numerical Methods, Non-Linear Programming, Optimization for Stochiastic Learning Skills & Languages Skills: NumPy, NeXpy, ROOT, Pandas, PyTorch, Tensor Flow Languages: Python, Julia, C++, Java, Verilog, Assembly, Qiskit - Jun 15
Software Engineer
Morganville, NJ
... I & II, Multivariable Calculus, Differential Equations, Electronic Devices Skills Computer Languages: Python, C, C++, Matlab, Verilog, Java, NodeJs Platform Skills: Windows Server, Ubuntu, Linux Work Experience & Projects Github: https://github.com ... - Jun 12
... I & II, Multivariable Calculus, Differential Equations, Electronic Devices Skills Computer Languages: Python, C, C++, Matlab, Verilog, Java, NodeJs Platform Skills: Windows Server, Ubuntu, Linux Work Experience & Projects Github: https://github.com ... - Jun 12
Project Manager Electrical Systems
Peabody, MA
... SKILLS Programming: C C++ MATLAB Python VHDL Verilog Perl Unix. Embedded Systems: Raspberry Pi Arduino I2C UART SPI. Software: AutoCAD SolidWorks Xilinx Vivado OrCAD Altium PSpice CST Visio SAP Revit. Miscellaneous: Soldering (THT & SMT) Cathode Ray ... - Jun 11
... SKILLS Programming: C C++ MATLAB Python VHDL Verilog Perl Unix. Embedded Systems: Raspberry Pi Arduino I2C UART SPI. Software: AutoCAD SolidWorks Xilinx Vivado OrCAD Altium PSpice CST Visio SAP Revit. Miscellaneous: Soldering (THT & SMT) Cathode Ray ... - Jun 11