| Distance: | Resume alert | Resumes 71 - 80 of 5966 |
Electrical Engineering, Product Manager
Denver, CO
... Engineering (Bachelor of Science) • Management (Minor) TECHNICAL SKILLS • Microsoft Office • MATLAB • C/C++ • Python • Verilog • LTSpice • HTML ENGINEERING PROJECTS ENGR132: Transforming Ideas to Innovation II Spring 2018 Made a MATLAB code to ... - Jun 03
... Engineering (Bachelor of Science) • Management (Minor) TECHNICAL SKILLS • Microsoft Office • MATLAB • C/C++ • Python • Verilog • LTSpice • HTML ENGINEERING PROJECTS ENGR132: Transforming Ideas to Innovation II Spring 2018 Made a MATLAB code to ... - Jun 03
Electrical Engineering A M
College Station, TX
... SKILLS Cadence, ADS, HFSS, PCB design, RF Circuit Design, Analog/Digital Layout, Electronics, Analog Design, PMIC, Active/Passive Filters, PLL, High Speed TX/RX, Lab Testing, Network Analyzer, Digital design, Verilog HDL, MATLAB/Simulink, C/C++. ... - Jun 03
... SKILLS Cadence, ADS, HFSS, PCB design, RF Circuit Design, Analog/Digital Layout, Electronics, Analog Design, PMIC, Active/Passive Filters, PLL, High Speed TX/RX, Lab Testing, Network Analyzer, Digital design, Verilog HDL, MATLAB/Simulink, C/C++. ... - Jun 03
Web Developer Front End
San Diego, CA
... LANGUAGES English, Arabic, Spanish SKILLS Coding: C, C++, Python, Verilog, Java, Assembly, Matlab, Swift, Kotlin, HTML, CSS, JavaScript, Django, React, Bootstrap, MaterialUI, MySQL, REST API, GitHub actions - ci/cd, MongoDB, Azure, AWS, Spring Boot, ... - Jun 03
... LANGUAGES English, Arabic, Spanish SKILLS Coding: C, C++, Python, Verilog, Java, Assembly, Matlab, Swift, Kotlin, HTML, CSS, JavaScript, Django, React, Bootstrap, MaterialUI, MySQL, REST API, GitHub actions - ci/cd, MongoDB, Azure, AWS, Spring Boot, ... - Jun 03
Machine Learning Data Science
Charlotte, NC
... TECHNICAL SKILLS Languages: Python, SQL, R, C, SAS, Bash, Verilog ML & Deep Learning: Scikit-learn, TensorFlow, PyTorch, Keras, XGBoost, Transformers, CNN, RNN, Seq2Seq, SpaCy, NLTK NLP & GenAI: Transformers (Hugging Face), SpaCy, NLTK, LSTM, Topic ... - Jun 03
... TECHNICAL SKILLS Languages: Python, SQL, R, C, SAS, Bash, Verilog ML & Deep Learning: Scikit-learn, TensorFlow, PyTorch, Keras, XGBoost, Transformers, CNN, RNN, Seq2Seq, SpaCy, NLTK NLP & GenAI: Transformers (Hugging Face), SpaCy, NLTK, LSTM, Topic ... - Jun 03
Software Engineering
Queens, NY, 11354
... Programming, Circuit Design and Analysis, Unix, Linux Shell Scripting, Ansible, Keil u Vision, Multisim, Proteus, Virtuoso Cadence, HSPICE, Data Structures and Algorithms, DBMS, SQL, Machine Learning, Verilog, Design for Test (DFT), BIST, firmware. ... - May 31
... Programming, Circuit Design and Analysis, Unix, Linux Shell Scripting, Ansible, Keil u Vision, Multisim, Proteus, Virtuoso Cadence, HSPICE, Data Structures and Algorithms, DBMS, SQL, Machine Learning, Verilog, Design for Test (DFT), BIST, firmware. ... - May 31
R&D Senior Specialist
San Ramon, CA
... ·16 years ASIC, FPGA design experience Knowledgeable on High Level Design (C, C++, SystemC and SystemVerilog), RTL Coding (VHDL, Verilog HDL), System, Timing analysis, and Logic Verification, Physical Design (Floor planning, Place and Route, Layout, ... - May 30
... ·16 years ASIC, FPGA design experience Knowledgeable on High Level Design (C, C++, SystemC and SystemVerilog), RTL Coding (VHDL, Verilog HDL), System, Timing analysis, and Logic Verification, Physical Design (Floor planning, Place and Route, Layout, ... - May 30
Software Engineer Embedded
Ho Chi Minh City, Vietnam
... 07/2024 - 12/2024 Team size: 2 members Team size: 2 members Programming languages: C/C++, C#, Python, Verilog, HTML, CSS. Microcontrollers: Arduino ATmega, ESP32, NXP... Protocol: UART, I2C, SPI. Experienced with Startup, Linker, Clock/Timer, ... - May 30
... 07/2024 - 12/2024 Team size: 2 members Team size: 2 members Programming languages: C/C++, C#, Python, Verilog, HTML, CSS. Microcontrollers: Arduino ATmega, ESP32, NXP... Protocol: UART, I2C, SPI. Experienced with Startup, Linker, Clock/Timer, ... - May 30
Design Engineer Digital
San Diego, CA
... Proficient in Verilog, VHDL, and System Verilog, with hands-on experience in ASIC synthesis, static timing analysis (STA), and low-power design. Skilled in using Synopsys and Cadence EDA tools for design, verification, and physical implementation. ... - May 29
... Proficient in Verilog, VHDL, and System Verilog, with hands-on experience in ASIC synthesis, static timing analysis (STA), and low-power design. Skilled in using Synopsys and Cadence EDA tools for design, verification, and physical implementation. ... - May 29
Project Management Intern
Irvine, CA
... • Debugged hardware with VHDL/Verilog in Linux, reducing error rates and boosting system stability for low-cost sensing devices. Software Developer Intern Siemens Energy Schenectady, NY 06/2024 - 08/2024 • Automated XML parsing with Python scripts, ... - May 29
... • Debugged hardware with VHDL/Verilog in Linux, reducing error rates and boosting system stability for low-cost sensing devices. Software Developer Intern Siemens Energy Schenectady, NY 06/2024 - 08/2024 • Automated XML parsing with Python scripts, ... - May 29
Systems Engineer Electrical Engineering
Silver Spring, MD
... May 1988 - August 2000 FORD MOTOR, Dearborn, MI Software Systems Engineer ●Incorporated multiplex/communications host chip (Verilog, FPGA) into system module designs. ●Lead tester for J1850 rigor at Ford Motor Company. ●Wrote Software Requirements ... - May 29
... May 1988 - August 2000 FORD MOTOR, Dearborn, MI Software Systems Engineer ●Incorporated multiplex/communications host chip (Verilog, FPGA) into system module designs. ●Lead tester for J1850 rigor at Ford Motor Company. ●Wrote Software Requirements ... - May 29