| Distance: | Resume alert | Resumes 41 - 50 of 5966 |
Embedded C, PCB Design
Ho Chi Minh City, Vietnam
... 2021: Implementing a project on Embedded Programming by writing a program to display a perpetual calendar through LCD using an AVR microcontroller is ATMega128 9/2022 – 12/2022: Design sequential circuits using Verilog hardware description language. ... - Jul 15
... 2021: Implementing a project on Embedded Programming by writing a program to display a perpetual calendar through LCD using an AVR microcontroller is ATMega128 9/2022 – 12/2022: Design sequential circuits using Verilog hardware description language. ... - Jul 15
Electrical Engineering System Design
San Jose, CA
... Engineering, San Jose State University – San Jose, CA 3.39/4 Aug 2023 – May 2025 Course Work: Advanced Digital System Design and Synthesis, Soc Design & Verification with System Verilog, Logic Verification with UVM, Advanced Computer Architecture. ... - Jul 07
... Engineering, San Jose State University – San Jose, CA 3.39/4 Aug 2023 – May 2025 Course Work: Advanced Digital System Design and Synthesis, Soc Design & Verification with System Verilog, Logic Verification with UVM, Advanced Computer Architecture. ... - Jul 07
System Developer Embedded
Ho Chi Minh City, Vietnam
... Programming languages: Verilog HDL, C, C++, Python, MATLAB. Tools: Oracle VirtualBox, Quartus Prime, STM32CubeIDE. Soft Skills: Presentation, Problem-Solving, Critical Thinking. CERTIFICATIONS Certificate of course "STM32 Programming" of the FETEL. ... - Jul 07
... Programming languages: Verilog HDL, C, C++, Python, MATLAB. Tools: Oracle VirtualBox, Quartus Prime, STM32CubeIDE. Soft Skills: Presentation, Problem-Solving, Critical Thinking. CERTIFICATIONS Certificate of course "STM32 Programming" of the FETEL. ... - Jul 07
Design Engineer Circuit
San Jose, CA
... Languages: IBIS models, Verilog-A, HSpice, Python, Ocean scripting, TCL scripting, MATLAB, C, C++ Software: Cadence Virtuoso (ADE XL, Maestro, Layout XL), Ansys Totem, Ansys Helic, Matlab, Hspice, Cadence Allegro, JMP, Logisim, Avanwaves, Cosim ... - Jul 06
... Languages: IBIS models, Verilog-A, HSpice, Python, Ocean scripting, TCL scripting, MATLAB, C, C++ Software: Cadence Virtuoso (ADE XL, Maestro, Layout XL), Ansys Totem, Ansys Helic, Matlab, Hspice, Cadence Allegro, JMP, Logisim, Avanwaves, Cosim ... - Jul 06
Ts Sci Mixed Signal
San Jose, CA
... USA citizen DoD Cleared SAP TS SCI CI-Poly Secret SUMMARY: ● Peter has 18+ years of experience in digital logic and mixed signal analog design with proficiency in RTL transistor and device circuit design Verilog, VHDL, System Verilog, Design ... - Jul 04
... USA citizen DoD Cleared SAP TS SCI CI-Poly Secret SUMMARY: ● Peter has 18+ years of experience in digital logic and mixed signal analog design with proficiency in RTL transistor and device circuit design Verilog, VHDL, System Verilog, Design ... - Jul 04
C++ Embedded Software
Bien Hoa, Dong Nai, Vietnam
... Able to read datasheets and basic circuit diagrams Digital & RTL Design: Familiar with Verilog HDL and RTL modeling. Able to design and simulate ALU, multiplexers, FSMs, using ModelSim and GTKWave Languages: English (basic), Vietnamese (native) ... - Jun 30
... Able to read datasheets and basic circuit diagrams Digital & RTL Design: Familiar with Verilog HDL and RTL modeling. Able to design and simulate ALU, multiplexers, FSMs, using ModelSim and GTKWave Languages: English (basic), Vietnamese (native) ... - Jun 30
Electronics Engineer, embedded systems and firmware
Scottsdale, AZ, 85260
... Debug GDB, JTAG, SWD, ITP, ICE, ROM EMULATOR, QEMU Algorithms ECC, CRC, LRC CAD OrCAD, P-Cad, ProCad, Eagle, Altium Designer Logic PAL, GAL, CPLD, FPGA, ASIC (HDL, RTL, Verilog, PALASM, ABEL, etc.) Memory NAND-FLASH, SPI FLASH, EPROM, EEPROM, DRAM, ... - Jun 23
... Debug GDB, JTAG, SWD, ITP, ICE, ROM EMULATOR, QEMU Algorithms ECC, CRC, LRC CAD OrCAD, P-Cad, ProCad, Eagle, Altium Designer Logic PAL, GAL, CPLD, FPGA, ASIC (HDL, RTL, Verilog, PALASM, ABEL, etc.) Memory NAND-FLASH, SPI FLASH, EPROM, EEPROM, DRAM, ... - Jun 23
Embedded systems engineer
Lee, MA
... Education University of Massachusetts Amherst Spring 2025 Bachelor of Science in Computer Engineering: GPA 3.11 Technical Skills Python programming, MATLAB, Microsoft Word, Excel, PowerPoint, C++, GDB, g++, Risc-V Assembly, Verilog, Linux systems, ... - Jun 23
... Education University of Massachusetts Amherst Spring 2025 Bachelor of Science in Computer Engineering: GPA 3.11 Technical Skills Python programming, MATLAB, Microsoft Word, Excel, PowerPoint, C++, GDB, g++, Risc-V Assembly, Verilog, Linux systems, ... - Jun 23
Test Engineer Product Development
San Antonio, TX, 78205
... Debuggers: AMD’s HDT, Intel’s ITP, JTAG, Xilinx Chip-Scope, MS Windows Debugger, Lauterbach Designware: VHDL, Verilog, Modelsim/NCsim, SytemVerilog, System-C, Vera, Specman testbench envs, Xilinx ISE, Plan-Ahead, DesignCompiler, Synplicity, and ... - Jun 23
... Debuggers: AMD’s HDT, Intel’s ITP, JTAG, Xilinx Chip-Scope, MS Windows Debugger, Lauterbach Designware: VHDL, Verilog, Modelsim/NCsim, SytemVerilog, System-C, Vera, Specman testbench envs, Xilinx ISE, Plan-Ahead, DesignCompiler, Synplicity, and ... - Jun 23
Machine Learning Health Sciences
Rowland Heights, CA
... Multimeter, Soldering Iron, 3D Printing, Network Analyzer, Function Generator Programming Languages: C++, Python, MATLAB, Verilog, VHDL, Git, G-code Software: KiCAD, SolidWorks, Fusion 360, Paesseler PRTG, LTspice PROFESSIONAL EXPERIENCE Engineering ... - Jun 22
... Multimeter, Soldering Iron, 3D Printing, Network Analyzer, Function Generator Programming Languages: C++, Python, MATLAB, Verilog, VHDL, Git, G-code Software: KiCAD, SolidWorks, Fusion 360, Paesseler PRTG, LTspice PROFESSIONAL EXPERIENCE Engineering ... - Jun 22