Barberton, OH, 44203
... TECHNICAL SKILLS PROGRAMMING & FIRMWARE: C, C++, C#, JAVA, SQL, PYTHON, VHDL, VERILOG EMBEDDED & ELECTRONICS: NRF52, ESP32, STM32, ARDUINO, PCB DIAGNOSTICS, SOLDERING, CIRCUIT REPAIR, MULTIMETERS, OSCILLOSCOPES DESIGN TOOLS: KICAD, FLUX.AI, QUARTUS, ...
- 2025 Dec 02
Austin, TX
... Designed RTL and System Verilog for the interface of digital and analog blocks including the output logic and the test modes based on the specs that combine both I2C and SPI protocols together.. Worked on the flow of system verification by building ...
- 2025 Nov 24
Vienna, VA
... Computer Skills ALDEC Active HDL, Altium Designer, Cadence, Mentor Graphics DxDesigner Schematic Tool, Verilog, VHDL, ORCAD, Xilinx Design Tools, ModelSim, Excel, Microsoft Word, Adobe Acrobat, PowerPoint, Visio, Oscilloscope, HP Logic Analyzer, ...
- 2025 Nov 19
Huntington, WV
... Technical Skills _ Languages: Python, C++, C, Java, C#, Go, Lua, JavaScript, SQL, Verilog Frameworks/Tools: PyTorch, TensorFlow, TVM, React, Node.js, Git, Azure, Unreal Engine 5, Blender, MongoDB, SQL Server, OpenCV, Wireshark Hardware/Systems: ...
- 2025 Nov 17
Cypress, CA
... Experience based on projects pertaining to Embedded Systems, FPGAs, Python, Verilog/VHDL, and electrical assembly. Able to accomplish tasks in a professional, organized, and strategic manner while exercising great communication skills. Experience RF ...
- 2025 Nov 15
Edmonton, AB, Canada
... SKILLS o Software: Python, C, C++, System Verilog, VHDL, MATLAB, RStudio, Assembly, LTSpice, Candence, SolidWorks, AutoCAD, Microsoft Office Suite (Excel, Word, PowerPoint, Outlook) o Hardware: Circuit Analysis, Microcontrollers (Arduino, MC9S12XE), ...
- 2025 Nov 11
Kennewick, WA
Michael Vincent 509-***-**** *******.*.*******@***.*** **** ********* ** ***** Summary Computer Scientist proficient in multiple computer programming languages, including C, C++, and Verilog. Strong understanding of data structures, digital circuits ...
- 2025 Nov 04
Cedar Rapids, IA
... Programming Languages: Verilog, C, and Python. WORK EXPERIENCE Skyworks Solutions Inc, Cedar Rapids, IA. June 2025 – Present RF Design Engineer Co-op • Design and development TXDSM MCMs for mid-high band 5G/LTE applications, focusing on RF ...
- 2025 Nov 02
United States
... Modeled in Verilog the whole chip and generated testing vectors for production testing. Timing closure for all designs using Synopsys Prime Time / Cadence Tempus to tape-out approximately 20 chips. o Read SPEF files generated by layout. o Used On ...
- 2025 Nov 01
Plano, TX, 75074
... OS : Unix, Linux HDL Languages : Verilog, VHDL HVL Language : System Verilog Simulation Tools : Model-Sim, gcc compiler, gdb debugger, Verilog XL, NcVHDL, VCS, NcVerilog (Cadence- Affirma). Synthesis Tools : DC Shell Linting Tool : Leda (Synopsys) ...
- 2025 Oct 29