| Distance: | Resume alert | Resumes 101 - 110 of 6086 |
Machine Learning C++
New York City, NY
KEVIN WU 929-***-**** ***********@*****.*** www.linkedin.com/in/kevin-wu-7207b2326 LANGUAGE AND IT SKILLS • Languages: Verilog, Matlab, C/C++, Python, SQL • Other Tools: Cadence Virtuoso, JasperGold, LTspice, Pytorch, CAD, Latex, Linux, MS Office ... - Mar 04
KEVIN WU 929-***-**** ***********@*****.*** www.linkedin.com/in/kevin-wu-7207b2326 LANGUAGE AND IT SKILLS • Languages: Verilog, Matlab, C/C++, Python, SQL • Other Tools: Cadence Virtuoso, JasperGold, LTspice, Pytorch, CAD, Latex, Linux, MS Office ... - Mar 04
Product Manager Data Center
San Jose, CA
... • Applied NLP-based sequence modeling with LSTM architectures to extract and classify malicious signatures in Verilog and VHDL designs, enhancing the accuracy of pattern recognition and threat classification. • Built a cloud-integrated security ... - Mar 03
... • Applied NLP-based sequence modeling with LSTM architectures to extract and classify malicious signatures in Verilog and VHDL designs, enhancing the accuracy of pattern recognition and threat classification. • Built a cloud-integrated security ... - Mar 03
Computer Engineering Software
East Chicago, IN
... RELEVANT SKILLS: • Programming Languages: Verilog–Proficient Python–Intermediate C–Intermediate C++–Intermediate HTML–Intermediate, JavaScript–Intermediate TypeScript–Intermediate MATLAB–Basic • Computer Skills: Microsoft Excel, PowerPoint, Word, ... - Feb 26
... RELEVANT SKILLS: • Programming Languages: Verilog–Proficient Python–Intermediate C–Intermediate C++–Intermediate HTML–Intermediate, JavaScript–Intermediate TypeScript–Intermediate MATLAB–Basic • Computer Skills: Microsoft Excel, PowerPoint, Word, ... - Feb 26
Process Engineer Electrical Engineering
Hillsboro, OR, 97124
... • Designed and executed test scenarios using System Verilog to validate the functionality and timing of the subsystem. Electronics Corporation of India Limited (ECIL) - Hyderabad, INDIA Intern Jan 2021 - May 2021 • Designed an accident detection ... - Feb 26
... • Designed and executed test scenarios using System Verilog to validate the functionality and timing of the subsystem. Electronics Corporation of India Limited (ECIL) - Hyderabad, INDIA Intern Jan 2021 - May 2021 • Designed an accident detection ... - Feb 26
Research Assistant Computer Engineering
Fairfax, VA
... work using cloud functions and RESTful APIs RISC-V ISA Processor Aug 2024 – Dec 2024 • Designed a dual-core CPU in System Verilog using RISC-V ISA with pipelines, caches, and cache-coherency • Verified functionality by creating test-benches, unit ... - Feb 25
... work using cloud functions and RESTful APIs RISC-V ISA Processor Aug 2024 – Dec 2024 • Designed a dual-core CPU in System Verilog using RISC-V ISA with pipelines, caches, and cache-coherency • Verified functionality by creating test-benches, unit ... - Feb 25
Software Engineer Ios Developer
San Jose, CA
... Wrote chip level & block level test benches using System Verilog and OVM Library. Wrote several OVM Drivers, Monitors, Agents. Wrote several RVM PCIE, SPI, I^2C, BFM’s. Wrote Packet Library for creating Ethernet, IP, UDP, DHCP, ARP packets. Wrote ... - Feb 25
... Wrote chip level & block level test benches using System Verilog and OVM Library. Wrote several OVM Drivers, Monitors, Agents. Wrote several RVM PCIE, SPI, I^2C, BFM’s. Wrote Packet Library for creating Ethernet, IP, UDP, DHCP, ARP packets. Wrote ... - Feb 25
Verification Engineer R D
El Jadida, Casablanca-Settat, Morocco
... Core strengths in: • Verification Partitioning and Development Flow • Directed and Coverage Driven Random Verification Flow • I/O Protocols and Controllers Verification TECHNICAL SKILLS Methodologies and UVM,System Verilog (SV), Verilog, System ... - Feb 24
... Core strengths in: • Verification Partitioning and Development Flow • Directed and Coverage Driven Random Verification Flow • I/O Protocols and Controllers Verification TECHNICAL SKILLS Methodologies and UVM,System Verilog (SV), Verilog, System ... - Feb 24
Computer Science Machine Learning
Troy, NY
... Computing SKILLS Languages: Java, Python, C++, C, Rust, HTML, CSS, JavaScript (React, Node, Express), SQL (PostgreSQL), MIPS, Verilog Tools: Git, VSCode, IntelliJ IDEA, Eclipse, JUnit Testing, Postman, Agile/Scrum Practices (Jira), Microsoft Office ... - Feb 23
... Computing SKILLS Languages: Java, Python, C++, C, Rust, HTML, CSS, JavaScript (React, Node, Express), SQL (PostgreSQL), MIPS, Verilog Tools: Git, VSCode, IntelliJ IDEA, Eclipse, JUnit Testing, Postman, Agile/Scrum Practices (Jira), Microsoft Office ... - Feb 23
Building Automation Engineer
Kansas City, MO
... SKILLS • Programming Languages: Verilog, RTL, C, Python, SQL • Software and Tools: AutoCAD, MATLAB, Multisim, Cadence, Microsoft Offic, Eagle, MobaXterm • Platforms: Arduino IDE, Kaggle, Google Colaboratory. • Engineering Expertise: SCADA Systems, ... - Feb 21
... SKILLS • Programming Languages: Verilog, RTL, C, Python, SQL • Software and Tools: AutoCAD, MATLAB, Multisim, Cadence, Microsoft Offic, Eagle, MobaXterm • Platforms: Arduino IDE, Kaggle, Google Colaboratory. • Engineering Expertise: SCADA Systems, ... - Feb 21
Control Systems Engineering
Houston, TX
... Visual Basic, ANSI C, Fortran, Python, SciPy, Sympy, Numpy, Matlab, Verilog HDL and Assembler programming. MS Office 2007 (Word, Excel, Power Point, Visio, Access). Computer Architecture design and programming. Mathematical Optimization. Computer ... - Feb 20
... Visual Basic, ANSI C, Fortran, Python, SciPy, Sympy, Numpy, Matlab, Verilog HDL and Assembler programming. MS Office 2007 (Word, Excel, Power Point, Visio, Access). Computer Architecture design and programming. Mathematical Optimization. Computer ... - Feb 20