| Distance: | Resume alert | Resumes 91 - 100 of 5893 |
Electrical Engineering Entry Level
Chandler, AZ
... Power System Analysis TECHNICAL SKILLS Design and Modeling Tools: Cadence, System Verilog, MATLAB, Microsoft Office, AutoCAD Programming: Python, HTML, C++ Other: FPGA ACADEMIC PROJECTS Design and Analysis of Differential to Single Ended Amplifier . ... - 2025 Jun 17
... Power System Analysis TECHNICAL SKILLS Design and Modeling Tools: Cadence, System Verilog, MATLAB, Microsoft Office, AutoCAD Programming: Python, HTML, C++ Other: FPGA ACADEMIC PROJECTS Design and Analysis of Differential to Single Ended Amplifier . ... - 2025 Jun 17
Customer Service, Software Engineer, Data Engineer
Valparaiso, IN
... & Networking, Intro to AI SKILLS Programming: C / C++, Python (PyTorch, Pandas, Flask), JavaScript, HTML, CSS, Bash, Assembly, Verilog Hardware: Oscilloscope, Multimeter, LTSpice, Soldering, PCB Design (Novice), KiCad, Simulink, SolidWorks Embedded ... - 2025 Jun 16
... & Networking, Intro to AI SKILLS Programming: C / C++, Python (PyTorch, Pandas, Flask), JavaScript, HTML, CSS, Bash, Assembly, Verilog Hardware: Oscilloscope, Multimeter, LTSpice, Soldering, PCB Design (Novice), KiCad, Simulink, SolidWorks Embedded ... - 2025 Jun 16
Design Engineer Security Clearance
Madison, AL
... Development Synthesis Using Synopsys & Cadence Tools Printed Circuit Board Design Analog Circuit Design Hardware Design Using Verilog & VHDL Universal Verification Methodology (UVM) TECHNICAL SKILLS Tools – Mentor: Questa Prime and Questa AutoFormal ... - 2025 Jun 15
... Development Synthesis Using Synopsys & Cadence Tools Printed Circuit Board Design Analog Circuit Design Hardware Design Using Verilog & VHDL Universal Verification Methodology (UVM) TECHNICAL SKILLS Tools – Mentor: Questa Prime and Questa AutoFormal ... - 2025 Jun 15
Machine Learning, C++, optimization
Elmhurst, IL
... Programming, Data Structures, Numerical Methods, Non-Linear Programming, Optimization for Stochiastic Learning Skills & Languages Skills: NumPy, NeXpy, ROOT, Pandas, PyTorch, Tensor Flow Languages: Python, Julia, C++, Java, Verilog, Assembly, Qiskit - 2025 Jun 15
... Programming, Data Structures, Numerical Methods, Non-Linear Programming, Optimization for Stochiastic Learning Skills & Languages Skills: NumPy, NeXpy, ROOT, Pandas, PyTorch, Tensor Flow Languages: Python, Julia, C++, Java, Verilog, Assembly, Qiskit - 2025 Jun 15
Software Engineer
Morganville, NJ
... I & II, Multivariable Calculus, Differential Equations, Electronic Devices Skills Computer Languages: Python, C, C++, Matlab, Verilog, Java, NodeJs Platform Skills: Windows Server, Ubuntu, Linux Work Experience & Projects Github: https://github.com ... - 2025 Jun 12
... I & II, Multivariable Calculus, Differential Equations, Electronic Devices Skills Computer Languages: Python, C, C++, Matlab, Verilog, Java, NodeJs Platform Skills: Windows Server, Ubuntu, Linux Work Experience & Projects Github: https://github.com ... - 2025 Jun 12
Project Manager Electrical Systems
Peabody, MA
... SKILLS Programming: C C++ MATLAB Python VHDL Verilog Perl Unix. Embedded Systems: Raspberry Pi Arduino I2C UART SPI. Software: AutoCAD SolidWorks Xilinx Vivado OrCAD Altium PSpice CST Visio SAP Revit. Miscellaneous: Soldering (THT & SMT) Cathode Ray ... - 2025 Jun 11
... SKILLS Programming: C C++ MATLAB Python VHDL Verilog Perl Unix. Embedded Systems: Raspberry Pi Arduino I2C UART SPI. Software: AutoCAD SolidWorks Xilinx Vivado OrCAD Altium PSpice CST Visio SAP Revit. Miscellaneous: Soldering (THT & SMT) Cathode Ray ... - 2025 Jun 11
Computer Engineering Entry Level
Plano, TX, 75024
... SPI module to render images onto VGA Skills ● Intermediate knowledge of Digital Design Concepts ● Intermediate skills in Verilog and C ● Experience with Altera FPGAs ● Intermediate Knowledge of Quartus ● Basic knowledge of ModelSim and SignalTap ... - 2025 Jun 11
... SPI module to render images onto VGA Skills ● Intermediate knowledge of Digital Design Concepts ● Intermediate skills in Verilog and C ● Experience with Altera FPGAs ● Intermediate Knowledge of Quartus ● Basic knowledge of ModelSim and SignalTap ... - 2025 Jun 11
Design Engineer Hardware
Dublin, CA
... MIPS Pipelined Processor with RAW hazard Resolution ASIC Physical Design, OpenLane Designed & Verified 5-stage 32-bitpipelined MIPS processor using Verilog HDL in Xilinx Vivado 2024.2. Implemented instruction-level parallelism & Integrated ... - 2025 Jun 11
... MIPS Pipelined Processor with RAW hazard Resolution ASIC Physical Design, OpenLane Designed & Verified 5-stage 32-bitpipelined MIPS processor using Verilog HDL in Xilinx Vivado 2024.2. Implemented instruction-level parallelism & Integrated ... - 2025 Jun 11
Systems Engineer Computer Engineering
San Diego, CA
... Familiar with Verilog, C, C++, Python, and Java. Experienced in full-stack web development using React and Django, with skills in circuit design, signal processing, and microcontroller programming. Strong problem-solving abilities, attention to ... - 2025 Jun 11
... Familiar with Verilog, C, C++, Python, and Java. Experienced in full-stack web development using React and Django, with skills in circuit design, signal processing, and microcontroller programming. Strong problem-solving abilities, attention to ... - 2025 Jun 11
Fpga Engineer Hands-On
Sacramento, CA
PRAPTI SHAH 279-***-**** **************@*****.*** linkedin.com/in/prapti-shah-71489b19a Sacramento – CA PROFESSIONAL SUMMARY Versatile FPGA Engineer with 1.5 years of hands-on experience in FPGA development, specializing in Verilog HDL, RTL ... - 2025 Jun 10
PRAPTI SHAH 279-***-**** **************@*****.*** linkedin.com/in/prapti-shah-71489b19a Sacramento – CA PROFESSIONAL SUMMARY Versatile FPGA Engineer with 1.5 years of hands-on experience in FPGA development, specializing in Verilog HDL, RTL ... - 2025 Jun 10