| Resume alert | Resumes 31 - 40 of 111 |
Design Engineer Professional Experience
Austin, TX
... (Audited),RFIC Design(Audited),High Speed I/O,VLSIDesign,Advanced VLSI Design(SRAM Design) TECHNICAL SKILLS Design Tools Cadence (Spice/ HpsiceD, Virtuoso/Caliber(DRC/LVS), Spectre),Xilinx ISE 12.1 Lab Instruments DMM,Digital OscilloScope,Analog/Rf ... - 2018 Feb 09
... (Audited),RFIC Design(Audited),High Speed I/O,VLSIDesign,Advanced VLSI Design(SRAM Design) TECHNICAL SKILLS Design Tools Cadence (Spice/ HpsiceD, Virtuoso/Caliber(DRC/LVS), Spectre),Xilinx ISE 12.1 Lab Instruments DMM,Digital OscilloScope,Analog/Rf ... - 2018 Feb 09
Hardware Design Engineer, RF Design, Board Design
Austin, TX
... TECHNICAL SKILLS PCB Design (Cadence Allegro tools) ● MATLAB ● Ansys HFSS ● Power Supply Design ● SPICE Simulation (LTSPICE, HSPICE, MICROCAP) ● Python ● Test Equipment (VNA, Oscilloscope, DMM, Probing) - 2017 Sep 28
... TECHNICAL SKILLS PCB Design (Cadence Allegro tools) ● MATLAB ● Ansys HFSS ● Power Supply Design ● SPICE Simulation (LTSPICE, HSPICE, MICROCAP) ● Python ● Test Equipment (VNA, Oscilloscope, DMM, Probing) - 2017 Sep 28
Manager Management
Austin, TX
... (Various vendor switch and hub experience.) Software: Microsoft Office Suite (Word, Excel, Works, Power Point), MS Project 2013, Cadence, Legato Networker, Veritas NetBackup, Solstice Management Center, Sun Net Manager, MS Project. Orion Network ... - 2017 Sep 05
... (Various vendor switch and hub experience.) Software: Microsoft Office Suite (Word, Excel, Works, Power Point), MS Project 2013, Cadence, Legato Networker, Veritas NetBackup, Solstice Management Center, Sun Net Manager, MS Project. Orion Network ... - 2017 Sep 05
Project Manager Management
Austin, TX
... Pro Excel WBS Visio Sand/Mud Plant PM WordPerfect PIMS Time lines PMP Works SAP Org charts Microsoft Windows Clarity/Cadence MI Processes Exacta mate Microsoft Project Microsoft PowerPoint Best Practice Portfolio Management HP Project Reporting ... - 2017 Jul 08
... Pro Excel WBS Visio Sand/Mud Plant PM WordPerfect PIMS Time lines PMP Works SAP Org charts Microsoft Windows Clarity/Cadence MI Processes Exacta mate Microsoft Project Microsoft PowerPoint Best Practice Portfolio Management HP Project Reporting ... - 2017 Jul 08
Sales Marketing
Leander, TX, 78641
... & Certifications Education Calvin College – Grand Rapids, MI Business / Marketing Training & Certifications Cadence Management Corporation Solution Selling Software Marketing Bootcamp Kern Direct S.U.R.E. Fire – Lead Generation Hootsuite Certified - 2017 Jun 26
... & Certifications Education Calvin College – Grand Rapids, MI Business / Marketing Training & Certifications Cadence Management Corporation Solution Selling Software Marketing Bootcamp Kern Direct S.U.R.E. Fire – Lead Generation Hootsuite Certified - 2017 Jun 26
Project/Program Manager
Austin, TX
... Improved production release cadence to 1 release/month. Led internal project to design SalesForce workflow processes for Sales, Customer Success Management, Implementations, Customer Support, and Finance teams. This automated the on-boarding process ... - 2017 May 22
... Improved production release cadence to 1 release/month. Led internal project to design SalesForce workflow processes for Sales, Customer Success Management, Implementations, Customer Support, and Finance teams. This automated the on-boarding process ... - 2017 May 22
C, C++, Verilog, System Verilog, UVM (basics), Perl
Austin, TX
... Created system level use cases using Cadence perspec system verifier. Wrote a Perl script to extract unique test cases from a run of multiple test cases. Fixed RTL and gate level simulation failures by modifying the RTL design or test case flow. ... - 2017 Mar 29
... Created system level use cases using Cadence perspec system verifier. Wrote a Perl script to extract unique test cases from a run of multiple test cases. Fixed RTL and gate level simulation failures by modifying the RTL design or test case flow. ... - 2017 Mar 29
Software Engineer
Austin, TX
... and the heads of various other teams at translating a set of high-level requirements into concrete testable components which must cater to a multitude of functional requirements, such as traceability, regulatory compliance and release cadence. ... - 2017 Mar 21
... and the heads of various other teams at translating a set of high-level requirements into concrete testable components which must cater to a multitude of functional requirements, such as traceability, regulatory compliance and release cadence. ... - 2017 Mar 21
Electrical Engineering Design
Austin, TX
... Skills Programming Languages : Verilog, Assembly, RTL, SystemVerilog (UVM), VHDL, Perl, Shell, C, C++ CAD tools and simulators : Cadence Virtuoso, Spectre, Assura, HSPICE, Modelsim, Xilinx Physical Design tools : Synopsys Design Vision, Cadence SOC ... - 2017 Mar 09
... Skills Programming Languages : Verilog, Assembly, RTL, SystemVerilog (UVM), VHDL, Perl, Shell, C, C++ CAD tools and simulators : Cadence Virtuoso, Spectre, Assura, HSPICE, Modelsim, Xilinx Physical Design tools : Synopsys Design Vision, Cadence SOC ... - 2017 Mar 09
CAD Designer/Drafter
Cedar Park, TX
... Integrated Circuit Layout and Design: Cadence Virtuoso/Allegro used in the Linux system to interpret logic gate symbols and schematics of base circuits to construct layouts where DRC and LVS verification where used to ensure physical and electrical ... - 2017 Feb 12
... Integrated Circuit Layout and Design: Cadence Virtuoso/Allegro used in the Linux system to interpret logic gate symbols and schematics of base circuits to construct layouts where DRC and LVS verification where used to ensure physical and electrical ... - 2017 Feb 12