Software Engineer Development

Contact

408-***-**** (Mobile)

************@*****.***

www.linkedin.com/in/sid-r-001680

(LinkedIn)

Top Skills

Intel Quartus Prime

MAX 10 FPGA

SystemVerilog

Languages

English

Patents

Apparatus and Method for Accurate

Barcode Scanning using Dynamic

Timing Feedback

Sid Ray

Embedded Systems Software Engineer

Tucson, Arizona, United States

Summary

Products: Kittyhawk Heaviside aircraft flight-control computer sensors, DO178B, Afero Secure Wifi/BLE Connected Module

(ASR-2), Afero Secure Hub, Amazon Dash Barcode Scanner, Amazon Dash Button, Siri-Audio-Reactive Light Display on Neopixel LED using Max10 FPGA, Mars Phoenix Mission, Boeing 787 Emergency Oxygen System, Various Jet Engine Controllers and Auxillary Power Unit, Raytheon Active Protection System High Side FPGA and Flight Control Computer, SM-II Guidance computer, SM- III BLK-2A Guidance Section Instrumentation FPGA and Kinetic Warhead Instrumention FPGA.

SoC: Xilinx Zynq Ultrascale+

RTOS/OS: VXWorks, Linux Device Drivers for my custom IP, uCOS, FreeRTOS, Baremetal with custom Rate Monotonic Scheduler FPGA: Xilinx Zynq Ultrascale+, Virtex-5, Spartan-3A/3E, Artix-7, Zync-7000, Cyclone 3, Coolrunner-II CPLD, Altera Max 10 Firmware: Embedded-C, C++, ARM, Freescale, Atmel and STM, AVR Atxmega

Cypress PSoC 3, PSoC 4 BLE, Linux programming, Socket programming, Linux Device Drivers, Linux User-Space Multithreaded Applications including shared memory, semaphores, signals and message queues, GCC, GDB, Makefile, Bash, Python, Matlab RTL: VHDL, Verilog, Xilinx, Altera, Microsemi, Modelsim, Xilinx ISE

& Vivado, Altera Quartus II

RTL IPs for UART, SPI, SDLC, I2C, Flash devices, ADC, DAC, PWM, Motor Encoders and ADXL345 accelerometer

Experience

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Rocket Dynamics Lab LLC

Founder and CEO

June 2022 - Present (3 years 1 month)

United States

Developed Mil-STD 1553 bus in VHDL for IMU sensor. Developed Manchester-II Encoder/Decoder, Bus Controller and Remote Terminal controls with full dual redundant bus capabilities. The IMU Sensor is for various NATO fighter and commercial aircraft and therefore had to be developed and verified to DO-254 DAL-A standards.

Developed Fibre-Channel Phy and Link-Layer control for an Microsemi IGLOO2 device. This included configuring the SERDES device using the Libero tool, writing the word-alignment logic, writing the 8b/10b encoder/ decoder with disparity management and creating the Fibre-Channel protocol message framing. All the above was written in VHDL. Kitty Hawk

Senior Embedded System Engineer

April 2020 - May 2022 (2 years 2 months)

Palo Alto, California, United States

Developed flight-controls software in Embedded C++ on the Xilinx Ultrascale SoC. Developed of Verilog-RTL for custom IP to read IMU data and Aircraft Air-Data. Both IMU and Air-Data systems ran on UART at 115200 baud. My Verilog-IP read the data and pushed to my custom FIFO and was presented to the A53 processor via AXI registers. This data was used for the feedback into the flight control loop in the software.

Apple

Senior Embedded-Firmware Staff Engineer

May 2017 - April 2020 (3 years)

Cupertino, California

Firmware design using Embedded-C. Designed Siri Audio Reactive Display on Neopixel LED strip using Max10 FPGA and STM32. System was successfully demo’d to Tim Cook and Jony Ive. Designed fan and motor PID loop controls for the thermal system. Code generation using Matlab/Stateflow for state machines. All fan controls using PWM and RPM based or temperature based setpoints. Fixed issues with all the chip to chip communications like SPI. Digital logic design in Verilog/VHDL for two of the automotive FPGAs present on the main controller boards used for all the different subsystems on the Page 2 of 5

system. Design included SPI implementation to control various I/O to the FPGA, fault detection functions, LED controls, PWM controls, sleep functions and safety shutdown.

FPGA used were Spartan-3A and Altera-Max-10.

Afero

Senior Embedded Software Engineer

October 2015 - May 2017 (1 year 8 months)

Los Altos, California

Designed and developed adapters in C to communicate with the customer's product and connect it to the Afero cloud. The protocols were implemented over UART using Afero's ASR-2 radio running on a SAMG55 ARM Cortex M4 MCU. Connected several of the customer's products to the Afero cloud successfully leading to multiple contracts for the company. In addition I performed other work such as board bring up for the ASR-2 radio including Wifi bring up on the WINC platform, developed a command line shell for the SAMG55 MCU for development and testing of the product, SAMG55 low power mode, stack backtrace utility and stack watermark. Designed and implemented the firmware for the Barcode Scanner on the Afero Secure Hub. The hub was successfully demonstrated at CES 2016. Received patent to dynamically extract clock to capture barcodes. Developed the bootloader for Over-The-Air (OTA) updates to the Freescale ARM Cortex M4 MCU inside of the Afero Hub.

Amazon Lab126

Senior Embedded Software Engineer

January 2014 - October 2015 (1 year 10 months)

Sunnyvale, California

Developed firmware for the New Amazon-Dash and the Amazon Dash Button. Accomplishments:

Developed firmware to capture barcodes from a barcode image sensor using Atmel ARM Cortex M4 core for the new Amazon Dash Barcode Scanner

(Amazon Fresh).

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Developed firmware to prevent the barcode scanner LED from powering on when pointed to the users face.

Architected and developed event based system to handle all realtime activities inside both the Dash button and the Dash Barcode Scanner products. Architected the firmware to perform all the necessary requirements for the products including button press logic, accelerometer, barcode sensor, barcode light logic, order placement and device registration. Raytheon Missiles & Defense

Senior Engineering Manager

April 2006 - January 2014 (7 years 10 months)

Firmware Engineer. SM-3 Blk 2A, FPGA for Guidance Section and Kinetic Warhead. Raytheon Active Protection System - Embedded C for the embedded microcontroller and VHDL for one of the two control FPGAs. SM-2 Guidance system software development in Assembly. FPGAs included Spartan-3A/Spartan-3E, Virtex-V, Cyclone-III, Max-10, Coolrunner-II, Spartan 7 Series, Artix-7 and Ultrascale series.

Developed RTL for Microsemi part in VHDL for a defensive projectile. The control system consisted of two FPGAs and one microcontroller (Atmel part). I designed the FSM for the control system for the squib-fire control and the communication to the microcontroller via a USRT (Universal Synchronous Receiver Transmitter). I designed the USRT on the FPGA side and implemented the software on the microcontroller side to send data to the FPGA. The microcontroller was designed to receive UART command data from the projectile umbilical which I then processed and sent over to the FPGA.

Developed automatic-test equipment using a Xilinx Spartan-3A FPGA. Developed custom IP for reading UART, SPI, USART and various company specific communication protocols such as SDLC/HDLC. NASA Jet Propulsion Laboratory

Senior Software Engineering

May 2004 - December 2005 (1 year 8 months)

Software Engineer for Mars Phoenix Scout Lander Camera. I developed the camera test equipment software where we could send commands to the camera and receive status information. I wrote the software in C on a Page 4 of 5

Linux machine. I created a command line interface and custom commands to exercise the camera for testing and verification. I also developed a thermal- vacuum chamber for the camera. This consisted of a 4 channel PID loop to control the temperature of the chamber from 85 degC to -75 degC. Heating was provided via heating-elements that I controls via solid state relays and cooling was provided by liguid nitrogen also controlled by solid state relays. I wrote the control-loop using Labview for this system. Tucson Embedded Systems, Inc. (TES)

Senior Software Engineer

February 1999 - May 2004 (5 years 4 months)

DO178B Software Development and Verification for Safety Critical Systems at DAL-A. I worked on several Honeywell/Allied-Signal systems. My work involved software verification per DO-178B standards in C++ and Python. I also did testing using Honeywell's Wiley monitor. Projects I worked on spanned from Cabin-Pressure Systems using PLM86 for the RJ series of Aircraft to engine for the TFE731 engine and AS907 and AS977 FADECs. I also architected the entire control software for a Pulsed-Oxygen system for the Boeing 787 aircraft. This software was developed to DO-178B DAL-A processes and was written in C on a Renesas microprocessor. Education

University of Arizona

Master's degree, Computer Engineering · (June 2011) Page 5 of 5

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