Design Engineer Senior Electrical
Resume:
William B Thompson
Escondido Ca 92025
*****************@*****.***
SUMMARY
Senior Electronic Design Engineer with 20 plus years in development of electronic circuit PWA and FPGA designs.More recent focus on radio control PWA with SOC separate from RF circuitry on another PWA. Prior work has centered around display and video acquisition system design . Responsibilities have encompassed the full product development life cycle from conception to product delivery. Demonstrated strong technical lead in development of board level hardware systems with digital/ baseband electronics, low frequency analog and board associated power supply development. Experienced with various families of FPGAs, most recent work is with Xilinx Vivado development system and Zynq Ultrascale+. FPGA development was for intelligent camera- based inspection systems with 10Gb interface.
SKILLS
Responsible for all aspects of the hardware development including concept and detailed design, PCB development, FPGA
/SOC design, design verification, qualification and pre-production builds while working closely with other functional team members.
Excellent working knowledge of analog and digital electronics including circuit design, schematic capture, printed circuit board layout, circuit card assembly, test and troubleshooting techniques. Have implemented designs interfacing to standard high speed I/O standards such as DisplayPort, Ethernet, PCI, SPI, I2C, as well as DDR memories. Digital designs up to 12 gigahz.
Implementation of high-speed video signal / digital signal processing algorithms within FPGAs such as data compression and offset/gain corrections in real time. Implementation of synthetic vision algorithms for smart cameras used for inspection systems.
Experience in hardware development for extended environment requirements including space and airborne. Designed radiation hardened FPGA logic for space payloads.
Experience with development tools for the design / schematic capture, simulation, and debug of board level products such as Altium, Mentor and Cadence tools. Experience with design integrity tools in Cadence,Mentor and Altium. Capable of achieving high speed PCB layouts with these tools. Most recent experience with Altium schematic and PCB layout with board stackup, impedance control and signal integrity using integrated tools in Altium Experience with the design, functional partitioning, synthesis and simulation of FPGAs using Verilog or VHDL. Significant involvement in FPGA/SOC design and verification modeling. This includes designs with Altera, Xilinx or Actel (now Microsemi) synthesis tools: Quartus, Vivado and Libero. Experience with Chipscope and Modelsim. Implementation of memory management units in FPGAS for DDR3 and DDR4 Familiar with Microsoft Office tools (Word, Excel, PowerPoint, Visio, Project) to create documentation such as specifications, bill of materials, schedules and test procedures. Familiar with business collaboration platforms such as JIRA, Confluence and Sharepoint.
EDUCATION
MSEE San Diego State University
BSEE University of Rhode Island
EXPERIENCE
Senior Electrical Design Engineer
9/1/2023 -- Present
Silvus Technologies - San Diego
Development of FPGA SOC based control modules for digital tactical radios utilizing SOCS from AMD/Xilinx and Microchip/Microsemi.
Senior Electrical Design Engineer
8/1/2018 – 9/1/2023
Wintress Engineering - San Diego
Development of inspection systems with networked smart cameras utilizing linear imaging. Senior Electrical Design Engineer
6/1/2014 – 8/1/2018
Leidos - San Diego
Development of portable Xray imaging systems and nuclear spectroscopy systems. Senior Electrical Design Engineer
8/1/2010 – 6/30/2015
Chassis Plans – San Diego
Design and integration of rugged computer systems
Senior Electrical Design Engineer
5/1/2004 – 7/30/2010
SAIC - San Diego
Development of radiographic imaging systems and air air/space borne hyper spectral imaging systems
FPGA Design Consultant
6/1/2006 – 6/30/2008
Neurosciences Institute (NSI) – Torrey Pines
Implementation of neural networks and retina fabric within FPGAs for synthetic sensory processing. Lead Electrical Design Engineer
4/1/2002 – 4/30/2004
GET Engineering - El Cajon
Led team in development and design of electronics for Navy tactical data systems. Senior Electrical Design Engineer
6/15/1989 – 3/30/2002
SAIT - San Diego
Development of flat panel display systems and video acquisition systems for avionics.
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