Design Engineer

VLSI Trained Engineer

VEMIREDDY VAMSI KRISHNA

CAREER OBJECTIVES

Take a challenging professional career in a reputed concern and to involve in Research

teams in developing innovative solutions which lead to my personal advancement and ultimately

contribute to the institutional growth.

TECHNICAL SKILLS

synthesis tools Xilinx ISE 14.4

HDL &HVL Verilog, System Verilog

Microcontrollers / FPGA Spartan 6, Spartan 3E.

Familiar Protocols I2C,SPI

Familiar OS Windows.

Area of Interest Digital Electronics,VLSI Design,

Area of interest in STA,FPGA,VERILOG and SYSTEM VERILOG

Research

MODELSIM, QUESTA SIM

Simulation tools

PROFESSIONAL COURSES

I Completed Professional Development Course, in VLSI Design and Verification

from Sandeepani School of VLSI Design.

EDUCATION

Name of University/Board Specialization Year Pass Aggregate

Degree Out

B.Tech JNTU Kakinada Electronics and 2014 62.38

Communication

12th Intermediate State board, Science 2010 79.99

A.P. Mathematics

Board of Secondary

education, A.P.

th

10 All 2008 81.16

WORKSHOPS &TRAINING ATTENDED

Two day workshop on PCB designing organized by ECE, in sri venketeswara college

•

of engineering and technology on Jan 2013

Attended national level seminor on ELECTRONIC SEVA.

•

PROJECTS :

Project Title: Design and FPGA Implementation of Optimized 32-Bit Vedic Multiplier.

The design of high speed multiplier and squaring architectures based upon ancient Indian Vedic

mathematics sutras. In existing Vedic multiplier architectures, the partial product terms are

computed in parallel and then added at the end to get the final result. In this work, all the partial

products are adjusted using concatenation operation and are added using single carry save adder

instead of two adders at different stages. The high speed Vedic multiplier architecture is then used

in the squaring modules. The reduced number of computations in multiplication due to adjusting

using concatenation operation and one carry save adder only, the designed multiplier offers

significant improvement in speed.

Software Tools: XILINX ISE

Project Title: RESUABLE VERIFIACTION ENVIRNOMENT FOR I2C PROTOCOL

In this project, an environment code based on system verilog is written to verify the DUT of I2C

master by analyzing TESTPLAN and SYSTEM VERILOG enhancements. Compared with the

parallel bus,I2C bus do require less wiring, fewer IC connection pins, and the less number of traces

required on printed circuit boards. So there are many applications of I2C bus in IC design..

Software Tools: MODEL SIM, Questa sim and XILINX ISE

CERTIFICATES

Received first prize in model expo in the year 2013.

•

Received first prize in poster presentation in the year 2013.

•

Rewarded as best school pupli leader.

•

Received first prize in paper presentation.

•

MY STRENGTHS

• Responsible,creative and optimistic.

• Hardwork and sincere.

SKILLS SUMMARY

• Self-confidence

• Self-awareness

• Self-motivate

• Organizational skills

PERSONAL DETAILS

• Father Name : Vemireddy Rama Rao

• D.O.B : 26, July, 1992.

sasidhar pg, 7th cross, hsr layout

• Current Address

Bangalore,KARNATAKA.

• Email ID : acxuyy@r.postjobfree.com

• Contact No : +91-955*******

DECLARATION

I do here by declare that all the above statements are true to the best of my knowledge

and belief.

Date:

Place: Bangalore. (Vemireddy Vamsi

Krishna)

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