| Resume alert | Resumes 101 - 110 of 678 |
Project Engineering
Bengaluru, KA, 560001, India
... Programming in HDL (both Verilog & VHDL) using Xilinx. MAT lab, Lab view and VLSI (Using HDL). PL/ SQL. Auto CAD (electronics), Corel Draw. PERSONAL SKILLS: Good communication skill Team building ability Adaptable Computer and research Skill. Good ... - 2016 Apr 29
... Programming in HDL (both Verilog & VHDL) using Xilinx. MAT lab, Lab view and VLSI (Using HDL). PL/ SQL. Auto CAD (electronics), Corel Draw. PERSONAL SKILLS: Good communication skill Team building ability Adaptable Computer and research Skill. Good ... - 2016 Apr 29
Engineering Testing
Bengaluru, KA, 560001, India
... Hardware Description Languages like Verilog and VHDL. PROJECTS UNDERTAKEN 1. Mobmerry Mobile application testing Duration: 2 days Mobmerry is an E-Commerce application where retailer sells their product. Here there is no home delivery option instead ... - 2016 Apr 28
... Hardware Description Languages like Verilog and VHDL. PROJECTS UNDERTAKEN 1. Mobmerry Mobile application testing Duration: 2 days Mobmerry is an E-Commerce application where retailer sells their product. Here there is no home delivery option instead ... - 2016 Apr 28
Engineering Design
Bengaluru, KA, 560001, India
... Used Verilog HDL for programming and implemented in FPGA. Verilog HDL was initially simulated using ModelSim Simulator and using Xilinx ISE simulator it is transferred into FPGA(Virtex 5). The output from TTL(photon detection) was converted to LVDS ... - 2016 Apr 25
... Used Verilog HDL for programming and implemented in FPGA. Verilog HDL was initially simulated using ModelSim Simulator and using Xilinx ISE simulator it is transferred into FPGA(Virtex 5). The output from TTL(photon detection) was converted to LVDS ... - 2016 Apr 25
Engineer Design
Bengaluru, KA, 560001, India
... Adept in VHDL, Verilog and C. Good exposure to RTL Design, Synthesis and simulation debugging. Worked on AMBA AHB/APB/ASB, UART, SPI, I2C and PCI. Strong in Computer Architecture, Digital Design. Familiarity with industry standard circuit design and ... - 2016 Apr 20
... Adept in VHDL, Verilog and C. Good exposure to RTL Design, Synthesis and simulation debugging. Worked on AMBA AHB/APB/ASB, UART, SPI, I2C and PCI. Strong in Computer Architecture, Digital Design. Familiarity with industry standard circuit design and ... - 2016 Apr 20
Electronics Engineer
Bengaluru, KA, 560001, India
... XII Science Stream Don Bosco Higher Secondary State Board 2007 73.08 % I School X General YWCA Matriculation and Matriculation 2005 72.00 % I Higher Secondary School TECHNICAL SKILLS Languages : HDL -- Verilog, VHDL Scripting – Shell Scripting, TCL. ... - 2016 Apr 17
... XII Science Stream Don Bosco Higher Secondary State Board 2007 73.08 % I School X General YWCA Matriculation and Matriculation 2005 72.00 % I Higher Secondary School TECHNICAL SKILLS Languages : HDL -- Verilog, VHDL Scripting – Shell Scripting, TCL. ... - 2016 Apr 17
Design Engineer
Bengaluru, KA, 560001, India
... Skill Sets: Languages Verilog, System Verilog Protocols AMBA AHB, UART Tools Questasim, Xilinx Education §Bachelor of Engineering (B.E.) in Electronics (SDM College of engineering, Ujire) from V.T.U. passed out in July 2015 with 60.11%. §Diploma in ... - 2016 Apr 17
... Skill Sets: Languages Verilog, System Verilog Protocols AMBA AHB, UART Tools Questasim, Xilinx Education §Bachelor of Engineering (B.E.) in Electronics (SDM College of engineering, Ujire) from V.T.U. passed out in July 2015 with 60.11%. §Diploma in ... - 2016 Apr 17
Engineering Project
Bengaluru, KA, 560001, India
... 71.00 73.22 73.22 74.44 70.00 86.4 DIPLOMA SEMESTER PERCENTAGE First Semester Second Semester Third Semester Fourth Semester Fifth Semester Sixth Semester 72.93 82.62 81.03 78.4 83.77 84.00 TECHNICAL SKILLS Programming Languages VERILOG, VHDL. ... - 2016 Apr 17
... 71.00 73.22 73.22 74.44 70.00 86.4 DIPLOMA SEMESTER PERCENTAGE First Semester Second Semester Third Semester Fourth Semester Fifth Semester Sixth Semester 72.93 82.62 81.03 78.4 83.77 84.00 TECHNICAL SKILLS Programming Languages VERILOG, VHDL. ... - 2016 Apr 17
Project Design
Bengaluru, KA, 560001, India
... -**** Professional Summary: Around 6 months of internship experience in VLSI Design and Verification which includes the using of tools Xilinx ISE, Mentor Graphics, Questa simulators by using verilog and introduction about System verilog methodology. ... - 2016 Apr 16
... -**** Professional Summary: Around 6 months of internship experience in VLSI Design and Verification which includes the using of tools Xilinx ISE, Mentor Graphics, Questa simulators by using verilog and introduction about System verilog methodology. ... - 2016 Apr 16
Project Medical
Bengaluru, KA, 560001, India
... polytechnic for women Hassan Karnataka Technical Board Banglore 2010 72.83 4 Xth / SSLC Sri Ramanjineya School Karnataka Secondary Education Examination Board, Bangalore 2004 72.64 Technical skill: Programming languages: C, VHDL, Verilog. Processors ... - 2016 Apr 15
... polytechnic for women Hassan Karnataka Technical Board Banglore 2010 72.83 4 Xth / SSLC Sri Ramanjineya School Karnataka Secondary Education Examination Board, Bangalore 2004 72.64 Technical skill: Programming languages: C, VHDL, Verilog. Processors ... - 2016 Apr 15
Project Software
Bengaluru, KA, 560001, India
... 2006 70% Academic Qualification RESUME Objective Areas of Interest 2 Programming languages Software programming : C, C++,Qt 4.8,HTML, Core Java, Android Hardware programming : VHDL,VERILOG,ASSEMBLY,EMBEDDED C Simulation software : MATLAB,ORCAD ... - 2016 Apr 11
... 2006 70% Academic Qualification RESUME Objective Areas of Interest 2 Programming languages Software programming : C, C++,Qt 4.8,HTML, Core Java, Android Hardware programming : VHDL,VERILOG,ASSEMBLY,EMBEDDED C Simulation software : MATLAB,ORCAD ... - 2016 Apr 11