| Resume alert | Resumes 61 - 70 of 143 |
Test Cases
New Delhi, Delhi, India
... Created test for all rules of HAL including synthesis & structural checks. Created test in SV and verilog for freescale deliverables around synchronous flops and combinational loop. Educational qualification ● VLSI training from Vedant, ... - 2019 Apr 12
... Created test for all rules of HAL including synthesis & structural checks. Created test in SV and verilog for freescale deliverables around synchronous flops and combinational loop. Educational qualification ● VLSI training from Vedant, ... - 2019 Apr 12
SME (Math)
New Delhi, Delhi, India
... asking the right questions instead of giving answers as you guide students to learn math using different Methods, strategy like Singapore Math, how to extend the question (which helps the learners to enhance their Analysis and Synthesis skills). ... - 2018 Aug 29
... asking the right questions instead of giving answers as you guide students to learn math using different Methods, strategy like Singapore Math, how to extend the question (which helps the learners to enhance their Analysis and Synthesis skills). ... - 2018 Aug 29
Regulatory Affairs
Gurugram, HR, India
... Synthesis and biological screenings of some new derivatives of Thiosemicarbazones AWARDS AND ACHIEVEMENTS Awarded Junior Research Fellowship by AICTE All India Rank of 53 in the GATE exam conducted by Indian Institute of Science, Bangalore in 2002. ... - 2017 Sep 22
... Synthesis and biological screenings of some new derivatives of Thiosemicarbazones AWARDS AND ACHIEVEMENTS Awarded Junior Research Fellowship by AICTE All India Rank of 53 in the GATE exam conducted by Indian Institute of Science, Bangalore in 2002. ... - 2017 Sep 22
Electrical Engineer Engineering
Noida, UP, India
... Processing, Economics of Electricity Markets, Solar Technology, Power Electronics, Coding, PCB Design and Fabrication, Circuit Analysis and Synthesis, Microcontrollers and Embedded Systems, PLCs, Control Systems, Technology Testing and Development. ... - 2017 Jul 16
... Processing, Economics of Electricity Markets, Solar Technology, Power Electronics, Coding, PCB Design and Fabrication, Circuit Analysis and Synthesis, Microcontrollers and Embedded Systems, PLCs, Control Systems, Technology Testing and Development. ... - 2017 Jul 16
Design Engineer
DL, India
... •Verification: Cadence-Assura, Silvaco-Guardian Synthesis: Xilinx ISE Other Tools - OrCAD (PSpice, CaptureCIS), MATLAB,FHSS. •Technical Subjects - Digital electronics, Analog CMOS Integration Circuit TECHNICAL PROJECTS 1.Title : Two stage ... - 2017 Jun 19
... •Verification: Cadence-Assura, Silvaco-Guardian Synthesis: Xilinx ISE Other Tools - OrCAD (PSpice, CaptureCIS), MATLAB,FHSS. •Technical Subjects - Digital electronics, Analog CMOS Integration Circuit TECHNICAL PROJECTS 1.Title : Two stage ... - 2017 Jun 19
Chemical Engineering Project
Ghaziabad, UP, India
... Minor Project on “Caprolactam Synthesis” Team Size: Five (5) In this project we analytically studied manufacturing of Caprolactam from phenol. Caprolactam is a basic raw material for the manufacturing of nylon6 fibres and presented among the faculty ... - 2017 Mar 08
... Minor Project on “Caprolactam Synthesis” Team Size: Five (5) In this project we analytically studied manufacturing of Caprolactam from phenol. Caprolactam is a basic raw material for the manufacturing of nylon6 fibres and presented among the faculty ... - 2017 Mar 08
Design Engineering
Faridabad, HR, India
... TEACHING AREA OF INTEREST Control System, Network Analysis & Synthesis, Signals and Systems,Electronics Circuit, Integrated Circuit, VLSI Design, Analog & Digital electronics, Electronic devices, Sensor & Instrumentation, Introduction to electric ... - 2017 Feb 11
... TEACHING AREA OF INTEREST Control System, Network Analysis & Synthesis, Signals and Systems,Electronics Circuit, Integrated Circuit, VLSI Design, Analog & Digital electronics, Electronic devices, Sensor & Instrumentation, Introduction to electric ... - 2017 Feb 11
Research Scientist (Organic Chemistry)
New Delhi, DL, India
... I was actively engaged on the synthesis of several large complex natural products. 1.Search & collect all literature and relevant data on various projects. 2.To carry out exploratory lab. work on the economically promising process and select one ... - 2017 Jan 15
... I was actively engaged on the synthesis of several large complex natural products. 1.Search & collect all literature and relevant data on various projects. 2.To carry out exploratory lab. work on the economically promising process and select one ... - 2017 Jan 15
Engineer Project
New Delhi, DL, India
... Hands on knowledge in FPGA Synthesis, Implementation, Real Time debugging and Simulation tools. Good Knowledge of C and C++ Programming. Knowledge of programming in SYSTEM VERILOG. Digital Signal Processing and implementation on FPGA using FPGA ... - 2016 Dec 31
... Hands on knowledge in FPGA Synthesis, Implementation, Real Time debugging and Simulation tools. Good Knowledge of C and C++ Programming. Knowledge of programming in SYSTEM VERILOG. Digital Signal Processing and implementation on FPGA using FPGA ... - 2016 Dec 31
Plant Project Manager
DL, India
... DNA synthesis and BrDu labeling in cell cultures. Transformation: Bacterial & Yeast: Cacl2 and electroporation, agro bacterial transformation in plant systems, transfection in cell cultures. RNA: Isolation from bacteria, yeast, plant and mammalian ... - 2016 Dec 24
... DNA synthesis and BrDu labeling in cell cultures. Transformation: Bacterial & Yeast: Cacl2 and electroporation, agro bacterial transformation in plant systems, transfection in cell cultures. RNA: Isolation from bacteria, yeast, plant and mammalian ... - 2016 Dec 24