| Resume alert | Resumes 81 - 90 of 143 |
Engineer Project
Gurgaon, HR, 122001, India
... Basic knowledge in FPGA (Spartan3E), C, C++ Basic know-how of Synthesis, Timing analysis Basic understanding of LAYERED PROTOCOL ARCHITECTURE Knowledge of BASIC PROTOCOLS – I2C, UART, AMBA AXI3, APB TRAINING NTPC Limited (June 2012 to August 2012) ... - 2016 Feb 02
... Basic knowledge in FPGA (Spartan3E), C, C++ Basic know-how of Synthesis, Timing analysis Basic understanding of LAYERED PROTOCOL ARCHITECTURE Knowledge of BASIC PROTOCOLS – I2C, UART, AMBA AXI3, APB TRAINING NTPC Limited (June 2012 to August 2012) ... - 2016 Feb 02
Project Public School
201301, India
... Hardware Tools: Precision Synthesis RTL PLUS 2012b.10, Mentor Graphics Pyxis Schematic. Proects and Tranings Undertaken : P.G. Diploma Project : Multichannel UART using FIFO. Major Project (B.E.) : RF Based Wireless Notice Board. Minor Project (B.E. ... - 2016 Jan 29
... Hardware Tools: Precision Synthesis RTL PLUS 2012b.10, Mentor Graphics Pyxis Schematic. Proects and Tranings Undertaken : P.G. Diploma Project : Multichannel UART using FIFO. Major Project (B.E.) : RF Based Wireless Notice Board. Minor Project (B.E. ... - 2016 Jan 29
Training Ms Office
Ghaziabad, UP, India
... Percentage Project Work: RISC Processor 6 Months Synthesis and simulation of RISC processor Language: English - Intermediate Hindi - Fluent Certifications: Six Week Training certificate in Verilog coding Six months Training certificate in automaton ... - 2015 Dec 13
... Percentage Project Work: RISC Processor 6 Months Synthesis and simulation of RISC processor Language: English - Intermediate Hindi - Fluent Certifications: Six Week Training certificate in Verilog coding Six months Training certificate in automaton ... - 2015 Dec 13
Engineer Project
New Delhi, DL, India
... TECHINICAL SKILLS HDL/HVL : VHDL,Verilog HDL,System Verilog Verification Methodology: System Verilog UVM Simulator: Model Sim 6.5 & 10.0, Questa Sim 10.0, Active HDL 8.1 Synthesis Tool: Xilinx ISE 14.1, Altera Quartus Backend Design Tool : PSpice ... - 2015 Dec 10
... TECHINICAL SKILLS HDL/HVL : VHDL,Verilog HDL,System Verilog Verification Methodology: System Verilog UVM Simulator: Model Sim 6.5 & 10.0, Questa Sim 10.0, Active HDL 8.1 Synthesis Tool: Xilinx ISE 14.1, Altera Quartus Backend Design Tool : PSpice ... - 2015 Dec 10
Medical Research
New Delhi, DL, India
... Effect of losartan on cardiac autonomic functions of rats during acute and chronic in hibition of nitric oxide synthesis. 57th Annual Conference of Physiologists and Pharmacologists of India, APPICON 13-17th Dec 2011, AIIMS, Delhi, India. IJPP Vol ... - 2015 Aug 26
... Effect of losartan on cardiac autonomic functions of rats during acute and chronic in hibition of nitric oxide synthesis. 57th Annual Conference of Physiologists and Pharmacologists of India, APPICON 13-17th Dec 2011, AIIMS, Delhi, India. IJPP Vol ... - 2015 Aug 26
Assistant Microsoft Office
Gurgaon, HR, India
... Review: Design and implementation of 16-bit RISC using MIPS (Microprocessor without Interlocking Pipelining Stage) using Verilog HDL and analyzing the simulation and synthesis in Xilinx ISE and Cadence tool and GDSII file generation. Title: “RTL ... - 2015 Aug 06
... Review: Design and implementation of 16-bit RISC using MIPS (Microprocessor without Interlocking Pipelining Stage) using Verilog HDL and analyzing the simulation and synthesis in Xilinx ISE and Cadence tool and GDSII file generation. Title: “RTL ... - 2015 Aug 06
Organic Chemistry College
Noida, UP, India
... Skills & Attribute: Synthesis reaction Calibration and operation of instrument. Good practical knowledge. Gas chromatography, spectrophotometer, karlfischer, Analysis of Raw material, inprocess,intermediate and finished product, Extra Curricular ... - 2015 Jul 17
... Skills & Attribute: Synthesis reaction Calibration and operation of instrument. Good practical knowledge. Gas chromatography, spectrophotometer, karlfischer, Analysis of Raw material, inprocess,intermediate and finished product, Extra Curricular ... - 2015 Jul 17
Quality,R&D,Techno Comm. of polymers,plastic,rubber,tech. textiles
New Delhi, DL, India
... “A process for the synthesis of poly-acrylamid rotation of reaction vessel”, D.A. Daholkar, Prakash Singh, A.K. Aggarwal, M.K. Bhal, Varshasachdeva & Minakshi Aggarwal. I.P. Application No. 99/Del/87. “A process for the synthesis of poly-acrylamid – ... - 2015 Jun 16
... “A process for the synthesis of poly-acrylamid rotation of reaction vessel”, D.A. Daholkar, Prakash Singh, A.K. Aggarwal, M.K. Bhal, Varshasachdeva & Minakshi Aggarwal. I.P. Application No. 99/Del/87. “A process for the synthesis of poly-acrylamid – ... - 2015 Jun 16
Engineering Project
New Delhi, DL, India
... Academic Achievements: Presented a Technical Paper titled "Review of Behavioral Simulation and Synthesis of Different Asynchronous Circuit using Balsa" in an international conference (ICNEND 2013), Saveetha University 2013. Published a Technical ... - 2015 Jun 04
... Academic Achievements: Presented a Technical Paper titled "Review of Behavioral Simulation and Synthesis of Different Asynchronous Circuit using Balsa" in an international conference (ICNEND 2013), Saveetha University 2013. Published a Technical ... - 2015 Jun 04
Developer Software Engineer
New Delhi, DL, India
... Text to Speech and Synthesis . Managing Human to Computer Interaction by giving wav files Call Monitoring Reports in Rourkela Steel Plant (Kolkatha) Role: . Application Developer Tools: . PHP,CSS, MySQL, JQuery, Code igniter Details: This is a ... - 2015 May 04
... Text to Speech and Synthesis . Managing Human to Computer Interaction by giving wav files Call Monitoring Reports in Rourkela Steel Plant (Kolkatha) Role: . Application Developer Tools: . PHP,CSS, MySQL, JQuery, Code igniter Details: This is a ... - 2015 May 04