| Resume alert | Resumes 81 - 90 of 412 |
Engineer Technical Support
Bengaluru, KA, India
... Published paper entitled “ Design and FPGA Implementation of an on-chip network with port addressing scheme for permutation network”, International Journal of Electrical and Electronics Research, Vol. 3, Issue 2, pp 224-232, April – June 2015 ... - 2018 Jan 12
... Published paper entitled “ Design and FPGA Implementation of an on-chip network with port addressing scheme for permutation network”, International Journal of Electrical and Electronics Research, Vol. 3, Issue 2, pp 224-232, April – June 2015 ... - 2018 Jan 12
Engineering Test Cases
Bengaluru, KA, India
... Organization: Pine Training Academy, Ghaziabad Duration : October, 2015 – March, 2016 Description : Digital Design using Schematics, Verilog and Implementation of FPGA Learning : Xilinx ISE 14.6, Verilog and FPGA Board Organization*: YOKOGAWA ... - 2017 Dec 14
... Organization: Pine Training Academy, Ghaziabad Duration : October, 2015 – March, 2016 Description : Digital Design using Schematics, Verilog and Implementation of FPGA Learning : Xilinx ISE 14.6, Verilog and FPGA Board Organization*: YOKOGAWA ... - 2017 Dec 14
Engineering C
Bengaluru, KA, India
... Description: A n algorithm for monitoring real-time electrocardiogram (ECG) was prototyped on FPGA platform. The FPGA chip is taken as the central microprocessor and applies structured design u sing V erilog h ardware d escription l anguage t o c ... - 2017 Nov 26
... Description: A n algorithm for monitoring real-time electrocardiogram (ECG) was prototyped on FPGA platform. The FPGA chip is taken as the central microprocessor and applies structured design u sing V erilog h ardware d escription l anguage t o c ... - 2017 Nov 26
Engineering Design
Bengaluru, KA, India
... PROJECT DETAILS: Under Graduate: • FPGA IMPLEMENTATION OF SCALABLE ENCRYPTION ALGORITHM • Domain : VLSI Post Graduate: • DESIGN AND IMPLEMENTATION OF DDFF USING A NOVEL EMBEDDED LOGIC MODULE • Domain : VLSI CONFERENCES ATTENDED: S.NO PAPER TITLE ... - 2017 Nov 22
... PROJECT DETAILS: Under Graduate: • FPGA IMPLEMENTATION OF SCALABLE ENCRYPTION ALGORITHM • Domain : VLSI Post Graduate: • DESIGN AND IMPLEMENTATION OF DDFF USING A NOVEL EMBEDDED LOGIC MODULE • Domain : VLSI CONFERENCES ATTENDED: S.NO PAPER TITLE ... - 2017 Nov 22
Project Power
Bengaluru, KA, India
... management and troubleshooting Tools : MATLAB Programming MATLAB- Simulink MPLAB PSIM Team Viewer Model Sim Basics Of XILINX FPGA Programming Career Interest: Power Electronics, Electric Drives, Power system & Renewables Experience: Worked with Scan ... - 2017 Nov 05
... management and troubleshooting Tools : MATLAB Programming MATLAB- Simulink MPLAB PSIM Team Viewer Model Sim Basics Of XILINX FPGA Programming Career Interest: Power Electronics, Electric Drives, Power system & Renewables Experience: Worked with Scan ... - 2017 Nov 05
Design Engineering
Bengaluru, KA, India
... Overview • Good understanding of the ASIC and FPGA design flow. • Extensive experience in writing RTL models in Verilog HDL and test bench’s in System Verilog and UVM. • Experience in using industry standard EDA tools for the front-end design. ... - 2017 Oct 16
... Overview • Good understanding of the ASIC and FPGA design flow. • Extensive experience in writing RTL models in Verilog HDL and test bench’s in System Verilog and UVM. • Experience in using industry standard EDA tools for the front-end design. ... - 2017 Oct 16
Design Engineering
Bengaluru, KA, India
... PROFILE SUMMARY B.tech in Electrical and Electronics Engineering from Prince Shri Venkateshwara Padmavathy Engineering College, Anna University, Chennai Good understanding of ASIC and FPGA design flow Extensive experience in writing RTL models in ... - 2017 Aug 17
... PROFILE SUMMARY B.tech in Electrical and Electronics Engineering from Prince Shri Venkateshwara Padmavathy Engineering College, Anna University, Chennai Good understanding of ASIC and FPGA design flow Extensive experience in writing RTL models in ... - 2017 Aug 17
Engineering High School
Bengaluru, KA, India
... KSEEB 2008 66.72% Technical Skills: ● MS office, C, Embedded systems ● VHDL, PCB Design, Cubesuite+, Arduino C ● Networking, FPGA,VLSI,ARM Microcontroller, Logic Design Project Taken: ● IN B.E: Child Activity Recognition using Accelerometer and RFID ... - 2017 Jul 26
... KSEEB 2008 66.72% Technical Skills: ● MS office, C, Embedded systems ● VHDL, PCB Design, Cubesuite+, Arduino C ● Networking, FPGA,VLSI,ARM Microcontroller, Logic Design Project Taken: ● IN B.E: Child Activity Recognition using Accelerometer and RFID ... - 2017 Jul 26
Engineer Design
Bengaluru, KA, India
KARTHI S Bengaluru, Karnataka ****** (C) +919********* ac1ayz@r.postjobfree.com Professional Summary Functional Verification engineer and Team Lead with over 13+ years of experience in verification of ASIC/FPGA at unit as well as chip level, ... - 2017 Jul 14
KARTHI S Bengaluru, Karnataka ****** (C) +919********* ac1ayz@r.postjobfree.com Professional Summary Functional Verification engineer and Team Lead with over 13+ years of experience in verification of ASIC/FPGA at unit as well as chip level, ... - 2017 Jul 14
Layout Design, PCB Design, Physical Design, SOC, DFT, FPGA
Bengaluru, KA, India
... “Review of Implementation of Image Processing Applications Implementation on FPGA” (Journal of Computing Technology). Achievements Complete 4 week summer training on “Embedded System” Complete the “MATLAB SAMULATING WORKSHOP” organized by Schematic ... - 2017 Jul 10
... “Review of Implementation of Image Processing Applications Implementation on FPGA” (Journal of Computing Technology). Achievements Complete 4 week summer training on “Embedded System” Complete the “MATLAB SAMULATING WORKSHOP” organized by Schematic ... - 2017 Jul 10