T.DEEPIKA
Contact Details : Blue Bells PG, No.**/12,
Rathna Avenue, Craig Park Layout
Richmond Town, Bangaluru-560025.
Email ID : ac3fn5@r.postjobfree.com
Mobile. No : 805-***-****
OBJECTIVE:
Aiming at excellence in the working field through hard work, dedication, and honesty at challenging environment and to share my knowledge for the improvement of students and growth of the organization.
WORK EXPERIENCE:
Programmer Analyst (6 months)
SPIRO Solutions pvt ltd, Chennai. (Nov19th 2009 to May 18th 2011) Domain: VLSI.
Lecturer (2 Years)
KNSK College of Engineering, Nagercoil (Sep 8th 2010 to Sep 4th 2012) VLSI Programmer
Xplora Technologies, Chennai. (July 1st 2017 to Oct 30th 2017 EDUCATIONAL PROFILE:
CLASS /
COURSE
NAME OF THE
INSTITUTION
BOARD OF
STUDY
YEAR OF
PASSING
AGGREGATE M.E
(VLSI DESIGN)
Sengunthar Engineering
College,Tiruchengode.
Anna university-
Chennai
2014
8.59
(CGPA)
B.E (ECE)
Vins Christian College of
Engineering, Nagercoil
Anna university-
Chennai
2009 74
HSC
Govt.Higher Secondary
School, Sundapattivilai State Board 2005 83.83
SSLC
Govt.Higher Secondary
School, Sundapattivilai State Board 2003 81.6
ACHIEVEMENTS:
• Secured University rank in M.E.(VLSI DESIGN) during the academic year 2012-2014.
COMPUTER PROFICIENCY:
• Programming Languages : C,C++,Verilog HDL,VHDL,SPICE.
• Software Tools : MS Office, Xilinx ISE 8.2i,
Modelsim,HSpice,Tanner EDA, MATLAB, SPSS.
PROJECT DETAILS:
Under Graduate:
• FPGA IMPLEMENTATION OF SCALABLE ENCRYPTION
ALGORITHM
• Domain : VLSI
Post Graduate:
• DESIGN AND IMPLEMENTATION OF DDFF USING A NOVEL
EMBEDDED LOGIC MODULE
• Domain : VLSI
CONFERENCES ATTENDED:
S.NO PAPER TITLE CONFERENCE NAME PLACE DATE
1. Design and Implementation
Of DDFF Using A Novel
Embedded Logic Module.
International Conference on
Advanced Computing,
ControlSystems, Machines
andEmbedded Technology
(ICACT)
J.K.K.Nattaraja
College of
Engineering and
Technology,
Komarapalayam
March 8, 2014
2. Design and Implementation
Of DDFF Using A Novel
Embedded Logic Module.
National Conference on
COMCON.
K.N.S.K College
of Engineering,
Nagercoil.
February 6,7
2014
AREA OF INTEREST:
• Digital Electronics
• Electronic Circuits and Devices
• VLSI Design
CO - CURRICULAR ACTIVITIES:
• Attended the one day workshop on CMOS VLSI System Design organized by the dept. of ECE, Sengunthar Engineering College, Tiruchengode.
• Attended the one day workshop on Digital image processing organized by the dept. of ECE, SUN Engineering College, Nagercoil.
• Attended aptitude training conducted by T.I.M.E for two weeks at Vins Christian College of Engineering.
• Attended one day training programme at KELTRON (P) Ltd., Trivandrum.
PERSONAL DETAILS:
Father’s Name : Mr.S.Thangaraja
Nationality : Indian
Date of birth : 02-06-1988
Language : Tamil, English
Marital Status : Married
Spouse Name : Mr.J.Jenil Gavaskar
DECLARATION:
I hereby declare that the above written particulars are true to the best of my knowledge and belief.
Place: Bangaluru Yours truly,
Date:
(T.DEEPIKA)