| Resume alert | Resumes 71 - 80 of 454 |
Manager Software Engineer
Fremont, CA
... Computer Simulation of Easy VL language: Implemented a simulation software using C++ to simulate Easy VL language which is similar to Verilog. AWARDS AND ACCOMPLISHMENTS Received “Employee SPOT Award” for delivering the high priority late task on ... - 2019 Feb 13
... Computer Simulation of Easy VL language: Implemented a simulation software using C++ to simulate Easy VL language which is similar to Verilog. AWARDS AND ACCOMPLISHMENTS Received “Employee SPOT Award” for delivering the high priority late task on ... - 2019 Feb 13
Electrical Engineering Design,Test,Characterization,Validation
San Jose, CA
... Programming: C, HTML, CSS, PL/SQL, MySQL, Java, Python, Verilog Software: MATLAB, Simulink, PSpice, VSS, AWR, Virtual Photonics, Microwave Office, SAP (BIBO), Weka Devices: Spectrum Analyzer, Vector Network Analyzer, Calibration Kit (E-Cal, SOLT), ... - 2019 Feb 13
... Programming: C, HTML, CSS, PL/SQL, MySQL, Java, Python, Verilog Software: MATLAB, Simulink, PSpice, VSS, AWR, Virtual Photonics, Microwave Office, SAP (BIBO), Weka Devices: Spectrum Analyzer, Vector Network Analyzer, Calibration Kit (E-Cal, SOLT), ... - 2019 Feb 13
Electrical Engineer Engineering
San Jose, CA
... Core Technologies Software Microsoft Word, Excel, PowerPoint, LTspice, DipTrace, MATLAB, C++, Python, Xilinx Verilog Design, FPGA Design, Microprocessor Programing (M0+) and Assembly Language Programing, AutoCAD, Assembly Language Hardware PID, ... - 2019 Jan 22
... Core Technologies Software Microsoft Word, Excel, PowerPoint, LTspice, DipTrace, MATLAB, C++, Python, Xilinx Verilog Design, FPGA Design, Microprocessor Programing (M0+) and Assembly Language Programing, AutoCAD, Assembly Language Hardware PID, ... - 2019 Jan 22
Software Eningeer
Cupertino, CA
... Pathmaker’s Program, Co-op student with Hewlett Packard Programming Languages: Python, Java, C++, C, JavaScript, C#, Verilog, Assembly Tools & Libraries: Jupyter Notebooks, Google Collaboratory, Django, Flask, Unity, XCode Pandas, Scikit-Learn, ... - 2019 Jan 08
... Pathmaker’s Program, Co-op student with Hewlett Packard Programming Languages: Python, Java, C++, C, JavaScript, C#, Verilog, Assembly Tools & Libraries: Jupyter Notebooks, Google Collaboratory, Django, Flask, Unity, XCode Pandas, Scikit-Learn, ... - 2019 Jan 08
Program Manager Supply Chain
Santa Clara, CA
... Inventory Management Tools and Technologies • Collaboration Tools – Smartsheet, SharePoint • Routers and Switches – Juniper PTX-5K, MX- 2010, SRX-5K • Various organization specific tools • Languages-Verilog, C, C++, HDL, Python and Shell scripting. ... - 2018 Nov 26
... Inventory Management Tools and Technologies • Collaboration Tools – Smartsheet, SharePoint • Routers and Switches – Juniper PTX-5K, MX- 2010, SRX-5K • Various organization specific tools • Languages-Verilog, C, C++, HDL, Python and Shell scripting. ... - 2018 Nov 26
Assistant Administrative
San Jose, CA
... CHOWDHURY (C) 408-***-**** ac7ore@r.postjobfree.com www.linkedin.com/in/chowdhuryfahima San Jose, CA QUALIFICATION SUMMARY Experienced in characterization, design, Gate-level simulation, synthesis and debugging RTL Design (Verilog) Hardware ... - 2018 Nov 13
... CHOWDHURY (C) 408-***-**** ac7ore@r.postjobfree.com www.linkedin.com/in/chowdhuryfahima San Jose, CA QUALIFICATION SUMMARY Experienced in characterization, design, Gate-level simulation, synthesis and debugging RTL Design (Verilog) Hardware ... - 2018 Nov 13
Design Engineer Manager
San Jose, CA
... o In-depth knowledge of device electronics, analog design, Verilog, IO, digital design and verification. Lead and taped out these most recent complex and high-speed Analog Circuits: Stealth start-up in Saratoga currently leading layout effort for ... - 2018 Nov 09
... o In-depth knowledge of device electronics, analog design, Verilog, IO, digital design and verification. Lead and taped out these most recent complex and high-speed Analog Circuits: Stealth start-up in Saratoga currently leading layout effort for ... - 2018 Nov 09
Design and Verification Engineer
San Jose, CA
... TECHNICAL SKILLS • Programming Languages: Verilog HDL, System Verilog (SV), UVM, Python, TCL, Perl. • EDA Tools: Synopsys VCS, Design Compiler, Xilinx Vivado, Altera Quartus, ModelSim. • Skills: Code/ Functional Coverage Analysis, Assertions (SVA), ... - 2018 Oct 29
... TECHNICAL SKILLS • Programming Languages: Verilog HDL, System Verilog (SV), UVM, Python, TCL, Perl. • EDA Tools: Synopsys VCS, Design Compiler, Xilinx Vivado, Altera Quartus, ModelSim. • Skills: Code/ Functional Coverage Analysis, Assertions (SVA), ... - 2018 Oct 29
Engineer Electrical Engineering
San Jose, CA
... Software – Python, shell scripting, PyCharm, Git, C, GNU x86 assembly, Visual Studio EDA Tools – Veloce, TBX, Cadence, Quartus, SPICE, ModelSim, Synopsis, Matlab, Verilog HDL Graphics APIs testing – DirectX 9, DX10, DX11, DX12, OpenGL, OpenCL. ... - 2018 Oct 25
... Software – Python, shell scripting, PyCharm, Git, C, GNU x86 assembly, Visual Studio EDA Tools – Veloce, TBX, Cadence, Quartus, SPICE, ModelSim, Synopsis, Matlab, Verilog HDL Graphics APIs testing – DirectX 9, DX10, DX11, DX12, OpenGL, OpenCL. ... - 2018 Oct 25
Project Engineering
San Jose, CA
... 2007 - June 2011 EXPERTISE Languages : Embedded C C++ Python VHDL Verilog Skills : RISC-V ISA, Codasip Studio, Domain Specific Architecture, UVM TensorFlow Altium Designer, Schematics, Board Bring-Up, Oscilloscope, Logic Analyzer GDB, JTAG Machine ... - 2018 Oct 10
... 2007 - June 2011 EXPERTISE Languages : Embedded C C++ Python VHDL Verilog Skills : RISC-V ISA, Codasip Studio, Domain Specific Architecture, UVM TensorFlow Altium Designer, Schematics, Board Bring-Up, Oscilloscope, Logic Analyzer GDB, JTAG Machine ... - 2018 Oct 10