| Distance: | Resume alert | Resumes 61 - 70 of 12332 |
Remote Client Experience Coordinator
Guilford, ME
... I increased sales by 98% in three years and continued to work during the pandemic by a no contact service while following CDC guidelines. I take pride in having created an amazing team of people that work well together and help me every day in ... - Sep 10
... I increased sales by 98% in three years and continued to work during the pandemic by a no contact service while following CDC guidelines. I take pride in having created an amazing team of people that work well together and help me every day in ... - Sep 10
SoC/UVM Design Verification Engineer
Bareilly, Uttar Pradesh, India
... & Interfaces: AMBA AXI4, AHB/AHB-Lite, APB, PCIe Gen5 Design Concepts: Multi-Clock & Reset Verification, Clock Domain Crossing (CDC), FIFO Verification, Register & Interrupt Verification, UPF Concepts Scripting & Automation: Python, TCL, Regression ... - Sep 10
... & Interfaces: AMBA AXI4, AHB/AHB-Lite, APB, PCIe Gen5 Design Concepts: Multi-Clock & Reset Verification, Clock Domain Crossing (CDC), FIFO Verification, Register & Interrupt Verification, UPF Concepts Scripting & Automation: Python, TCL, Regression ... - Sep 10
Board-Certified Family Nurse Practitioner & Sonography
Hicksville, NY
... Manage chronic opioid therapy utilizing CDC guidelines, PDMP review, urine drug screening, opioid agreements, pill counts, and risk mitigation strategies. Collaborate with orthopedic surgeons, neurosurgeons, physical therapists, and primary care ... - Sep 10
... Manage chronic opioid therapy utilizing CDC guidelines, PDMP review, urine drug screening, opioid agreements, pill counts, and risk mitigation strategies. Collaborate with orthopedic surgeons, neurosurgeons, physical therapists, and primary care ... - Sep 10
Digital ASIC/FPGA Verification Engineer (UVM)
Raleigh, NC
... Architected reusable peripheral IP blocks across UART, SPI, I2C, and USB, built constrained-random verification environments with SVA and coverage metrics, and resolved CDC and timing-closure bottlenecks. Published IEEE researcher focused on energy ... - Sep 10
... Architected reusable peripheral IP blocks across UART, SPI, I2C, and USB, built constrained-random verification environments with SVA and coverage metrics, and resolved CDC and timing-closure bottlenecks. Published IEEE researcher focused on energy ... - Sep 10
Embedded Systems & Edge AI Engineer
Houston, TX
... AI Deployment, Python automation, Automated Log, Waveform Analysis Digital Design & Verification: RTL Design (FSM, Pipelining, CDC, Clock Gating), UVM-Based Verification, Testbench Development, SVA, Constrained-Random Testing, Functional Coverage, ... - Sep 10
... AI Deployment, Python automation, Automated Log, Waveform Analysis Digital Design & Verification: RTL Design (FSM, Pipelining, CDC, Clock Gating), UVM-Based Verification, Testbench Development, SVA, Constrained-Random Testing, Functional Coverage, ... - Sep 10
Senior ASIC/FPGA Design Verification Engineer
St. Louis, MO
... •Hands-on experience with clock domain crossing (CDC) verification and block-level to subsystem-level verification flows for complex multi-core SoC architectures. •Experienced in regression automation and verification infrastructure development ... - Sep 10
... •Hands-on experience with clock domain crossing (CDC) verification and block-level to subsystem-level verification flows for complex multi-core SoC architectures. •Experienced in regression automation and verification infrastructure development ... - Sep 10
RTL Verification & FPGA VLSI Engineer
Chicago, IL
... concepts, coverage concepts, regression re- view, bug tracking • ASIC Flow: RTL coding, lint review, synthesis-readiness checks, CDC concepts, low-power design concepts, static timing analysis concepts, design handoff support • Debugging: Waveform ... - Sep 10
... concepts, coverage concepts, regression re- view, bug tracking • ASIC Flow: RTL coding, lint review, synthesis-readiness checks, CDC concepts, low-power design concepts, static timing analysis concepts, design handoff support • Debugging: Waveform ... - Sep 10
Healthcare Business & Pharmacy Support Manager
Leesville, LA
... Fort Polk CDC-Bldg. 3349 Fort Polk, LA Child/Youth Program Assistant August 2013 to May 2014 ●Monitor children in various activities (e.g., lunch, snack time, rest periods, group or individual play, outdoors, etc.) for the purpose of providing a ... - Sep 09
... Fort Polk CDC-Bldg. 3349 Fort Polk, LA Child/Youth Program Assistant August 2013 to May 2014 ●Monitor children in various activities (e.g., lunch, snack time, rest periods, group or individual play, outdoors, etc.) for the purpose of providing a ... - Sep 09
Executive Chef - Kitchen & Cost Control Leader
San Antonio, TX
. YANCEY VOGES EXECUTIVE CHEF CONTACT 210-***-**** ***********@*****.*** San Antonio, TX 78258 SKILLS • Food Preparation & Execution • Culinary Techniques • Menu Planning & Development • Recipe Design & Creation • Flavor Pairing & Pallet Matching... - Sep 09
. YANCEY VOGES EXECUTIVE CHEF CONTACT 210-***-**** ***********@*****.*** San Antonio, TX 78258 SKILLS • Food Preparation & Execution • Culinary Techniques • Menu Planning & Development • Recipe Design & Creation • Flavor Pairing & Pallet Matching... - Sep 09
Executive Administrative Assistant & Ops Support
Atlanta, GA
... Public Policy Georgia Institute of Technology Aug 2011 – Dec 2015 - Provided policy recommendations for the CDC as part of a student task force - Interned for the Georgia House Caucus assisting in legislative research - Acted as Minority Education ... - Sep 08
... Public Policy Georgia Institute of Technology Aug 2011 – Dec 2015 - Provided policy recommendations for the CDC as part of a student task force - Interned for the Georgia House Caucus assisting in legislative research - Acted as Minority Education ... - Sep 08