Hardware Design C++

Paul Chukwu

Ottawa, ON K*Z *G* • 613-***-**** • ****.******.********@*****.*** •WWW:

https://paulchukwu1.github.io/Skooby/ •WWW: Bold Profile Professional Summary:

Engineering student at uOttawa with expertise in hardware design and development, skilled in Python, Java, C, C++, Verilog, System Verilog, VHDL, and Assembly. Proficient in Quartus-II Pro with over 20+ FPGA projects, including pin assignments, task programming, and working with various FPGAs during the Hack the Hill(Hackathon) sponsored by Ross Videos, where I tackled vector manipulation and display creation challenges. Experienced in designing digital systems and solving complex hardware problems, I am eager to contribute my skills in hardware design and FPGA development to drive innovation.

Projects:

Shell Eco Marathon – uOttawa Sponsored Car Racing Team, 2024/2025

• Designed and built a functional car body from scratch using CAD and 3D printing.

• Developed a telemetry system in C/C++ for real-time data monitoring.

• Integrated a speedometer using magnets and sensors, calculating speed and displaying data via CLion IDE.

• Delivered a modern, fully functional vehicle with enhanced performance for competition. UART Communication System 2024

• Designed and implemented a UART system using VHDL, including both transmitter and receiver components.

• Built on a Finite State Machine (FSM) lab project to enhance understanding of structural and behavioral design.

• Developed key UART components, such as the TDR register and transmitter controller, to handle 8-bit data transmission.

• Insights into low-level hardware design and communication systems through overcoming design challenges.

ROSS VIDEO - Hack the Hill(uOttawa Hackathon), 2024

• Developed a 1080x720 video display system using Ross equipment, Quartus-II Pro, and System Verilog.

• Gained expertise in video signal timing, including VANC and HANC implementation for metadata handling.

• Designed dynamic visual elements by calculating precise coordinates and integrating mathematical and logical solutions.

• Delivered a functional and visually engaging project, showcasing advanced video display and timing techniques.

Innovative Recycling Solution Development

• Designed and prototyped a user-friendly recycling device using CAD, integrating efficient processes and automated functionality with Python and Java algorithms.

• Conducted cost analysis, identified funding opportunities, and developed a strategic business plan to ensure feasibility and scalability

Education

BASc in Computer Engineering, Expected Graduation in 06/2026 University of Ottawa - Ottawa, None

• Term Dean's List, [June, 2022]

• Honor Roll, [June, 2022]

• Recipient of UOSU Scholarship for Innovation in the Sustainability Field [June, 2024]

• Completed College-level Coursework: [FBGA, Quartus-II Pro, Microcontroller]

• Completed College-level Coursework: [Technical Writing For Engineers]

• Completed College-level Coursework: [ALU and ALSU Construction]

• Completed College-level Coursework: [ Electrical Circuits and Board Construction]

• Completed College-level Coursework: [System Verilog, VHDL Coding with ASM and FSM Method]

Notre Dame High School - Ottawa, ON (8.5 GPA)

High School Diploma: 06/2022

Work Experience

Intern, 08/2021 to 01/2023

Snappy Techs – Ottawa, ON

• Supported staff members in their daily tasks, reducing workload burden and allowing for increased focus on higher-priority assignments.

• Gained valuable experience working within a specific industry, applying learned concepts directly into relevant work situations.

• Sorted and organized files, spreadsheets, and reports.

• Gained hands-on experience in various software and hardware programs, increasing proficiency and expanding technical skill set.

Languages

VHDL System Verilog C language

References

References available upon request.

Contact this candidate