| Resume alert | Resumes 61 - 70 of 455 |
Software Engineer Data
Sunnyvale, CA
... Skills Programming Languages: Python, C++, C, Java, Matlab, R, HTML, CSS, Verilog, VHDL Other Skills: Machine Learning, Data Mining OS and Software: Linux, Windows, Eclipse, IntelliJ, Jupyter, PyCharm, Android Studio, Xcode, Git, LAT EX Selected ... - 2019 Oct 22
... Skills Programming Languages: Python, C++, C, Java, Matlab, R, HTML, CSS, Verilog, VHDL Other Skills: Machine Learning, Data Mining OS and Software: Linux, Windows, Eclipse, IntelliJ, Jupyter, PyCharm, Android Studio, Xcode, Git, LAT EX Selected ... - 2019 Oct 22
Electronics Engineer
Santa Clara, CA
... Microsoft Office (98, XP, 2000 and 2003) and Open Office Programming Languages: C, C++, Perl, Python, Tcl, MatLab, RTL verilog, VHDL and 80X86 Assembly Language Operating Systems: Windows (2k Pro, XP, XP Pro, and 7), Mac OS X, Linux and UNIX ... - 2019 Oct 10
... Microsoft Office (98, XP, 2000 and 2003) and Open Office Programming Languages: C, C++, Perl, Python, Tcl, MatLab, RTL verilog, VHDL and 80X86 Assembly Language Operating Systems: Windows (2k Pro, XP, XP Pro, and 7), Mac OS X, Linux and UNIX ... - 2019 Oct 10
Embedded Firmware Engineer
San Jose, CA
... Engineering, Gujarat Technological University, India 3.63 May 2017 TECHNICAL SKILLS Programming Languages & OS: C/C++, Embedded C, Verilog, Python, Assembly, Linux, Ubuntu, FreeRTOS Communication Protocols: UART, I2C, SPI, ADC, CAN, DBC, Bluetooth, ... - 2019 Jul 13
... Engineering, Gujarat Technological University, India 3.63 May 2017 TECHNICAL SKILLS Programming Languages & OS: C/C++, Embedded C, Verilog, Python, Assembly, Linux, Ubuntu, FreeRTOS Communication Protocols: UART, I2C, SPI, ADC, CAN, DBC, Bluetooth, ... - 2019 Jul 13
Engineer Test
Sunnyvale, CA
... • Expertise in development of UVM/OVM compliant coverage driven randomized Test bench environment using System Verilog & SVA • Experience in developing and executing the test plan for the verification of ASIC, develop and maintain test environment, ... - 2019 Jul 10
... • Expertise in development of UVM/OVM compliant coverage driven randomized Test bench environment using System Verilog & SVA • Experience in developing and executing the test plan for the verification of ASIC, develop and maintain test environment, ... - 2019 Jul 10
Engineer Electrical
San Jose, CA
... University (India) RELEVANT COURSES Digital System Design and Synthesis, ASIC CMOS Design, High Speed CMOS Circuits, SoC Design and Verification with System Verilog, Advance Computer Architecture, Design of CMOS Digital Integrated Circuits. ... - 2019 May 14
... University (India) RELEVANT COURSES Digital System Design and Synthesis, ASIC CMOS Design, High Speed CMOS Circuits, SoC Design and Verification with System Verilog, Advance Computer Architecture, Design of CMOS Digital Integrated Circuits. ... - 2019 May 14
Design Engineer Engineering
San Jose, CA, 95125
... PROFESSIONAL EXPERIENCE Chronological: 1992 - 2004 Exemplar Logic FPGA EDA tool box for synthesis simulation of Verilog VHDL variants. XNF and CLB with LUT optimization. Mentor Graphics Corp, Conexant MindSpeed, AMD NVD. Finite state machine,FSM ... - 2019 Apr 28
... PROFESSIONAL EXPERIENCE Chronological: 1992 - 2004 Exemplar Logic FPGA EDA tool box for synthesis simulation of Verilog VHDL variants. XNF and CLB with LUT optimization. Mentor Graphics Corp, Conexant MindSpeed, AMD NVD. Finite state machine,FSM ... - 2019 Apr 28
Manufacturing Engineer Manager
San Jose, CA
... Skills: Languages: C++, HTML, Java Script, CSS, Verilog, Python and MATLAB, and knowledge about Microsoft office. CAD Tools: Codeblocks, Visual Studio, MATLAB, LT Spice MS Office Products. Engineering tools: LTSpice, Diptrace. Oscilloscope, Digital ... - 2019 Apr 25
... Skills: Languages: C++, HTML, Java Script, CSS, Verilog, Python and MATLAB, and knowledge about Microsoft office. CAD Tools: Codeblocks, Visual Studio, MATLAB, LT Spice MS Office Products. Engineering tools: LTSpice, Diptrace. Oscilloscope, Digital ... - 2019 Apr 25
Electrical Engineering Design
San Jose, CA
... Experienced in ASIC Design Flow, Verilog, CDC, System Verilog, UVM, C and Linux. EDUCATION The George Washington University, Washington, DC May 2018 Master of Science in Electrical Engineering, GPA:3.55/4.0 Relevant Courses: VLSI/ASIC Design, ... - 2019 Apr 05
... Experienced in ASIC Design Flow, Verilog, CDC, System Verilog, UVM, C and Linux. EDUCATION The George Washington University, Washington, DC May 2018 Master of Science in Electrical Engineering, GPA:3.55/4.0 Relevant Courses: VLSI/ASIC Design, ... - 2019 Apr 05
Software Developer
San Jose, CA
... Management, Marketing, Accounting & Enterprise Finance, Global Business Java, JavaScript, Python, C/C++, HTML, CSS, Verilog, Valgrind, GDB, Unix, Matlab, LaTeX, Git, Vim, Linux, Jupyter Notebook, Windows, iOS Microsoft Office, Excel, Photoshop ... - 2019 Apr 03
... Management, Marketing, Accounting & Enterprise Finance, Global Business Java, JavaScript, Python, C/C++, HTML, CSS, Verilog, Valgrind, GDB, Unix, Matlab, LaTeX, Git, Vim, Linux, Jupyter Notebook, Windows, iOS Microsoft Office, Excel, Photoshop ... - 2019 Apr 03
Electrical Engineer Engineering
San Jose, CA
... Verilog, AutoCAD Software MATLAB, SPICE Software Mastery of Microsoft Office programs (Word, Excel, PowerPoint) Comfortable working in both Microsoft Windows 10 and Mac OS X Installing and hands-on repairing techniques & Technical troubleshooting’s. ... - 2019 Mar 25
... Verilog, AutoCAD Software MATLAB, SPICE Software Mastery of Microsoft Office programs (Word, Excel, PowerPoint) Comfortable working in both Microsoft Windows 10 and Mac OS X Installing and hands-on repairing techniques & Technical troubleshooting’s. ... - 2019 Mar 25