| Resume alert | Resumes 31 - 40 of 455 |
Digital and Physical Design Engineer, Verification Engineer
Santa Clara, CA
... of Engineering, Electronics and Telecommunication Engineering GPA: 9.12/10 TECHNICAL SKILLS Programming Languages: Verilog, SystemVerilog, Python Tools: Cadence Virtuoso, QuestaSim, Quartus, HSPICE, Xilinx Vivado, PrimeTime(STA), Innovus(PnR) ... - 2021 May 30
... of Engineering, Electronics and Telecommunication Engineering GPA: 9.12/10 TECHNICAL SKILLS Programming Languages: Verilog, SystemVerilog, Python Tools: Cadence Virtuoso, QuestaSim, Quartus, HSPICE, Xilinx Vivado, PrimeTime(STA), Innovus(PnR) ... - 2021 May 30
Engineering Manager Design Engineer
Los Gatos, CA, 95032
... o Environment -- Linux o Language -- Python & PyQT4 Took over existing Memory Compiler software created by TI software team and collaborated with memory designers to enhance the tool to support additional EDA views (Mixed Signal Verilog, Cadence EPS ... - 2021 May 24
... o Environment -- Linux o Language -- Python & PyQT4 Took over existing Memory Compiler software created by TI software team and collaborated with memory designers to enhance the tool to support additional EDA views (Mixed Signal Verilog, Cadence EPS ... - 2021 May 24
Java Engineer
Mountain View, CA
... GPA: 3.66/4.0 - Made Dean’s List in Fall 2018 to Fall 2019, and Spring 2020 Relevant Courses: - Data Structures and Algorithms using Java, Linear Algebra, Formal Language and Computations Technical Skills: - Java, C++, Verilog, some Javascript, some ... - 2021 May 06
... GPA: 3.66/4.0 - Made Dean’s List in Fall 2018 to Fall 2019, and Spring 2020 Relevant Courses: - Data Structures and Algorithms using Java, Linear Algebra, Formal Language and Computations Technical Skills: - Java, C++, Verilog, some Javascript, some ... - 2021 May 06
Verilog, Python, RTL Design
San Jose, CA
... SOC Design using System Verilog, Embedded System On-Chip, Artificial Intelligence using DSP, UVM, Computer Architecture. SGSITS, Indore, MP, India - CGPA - 7.4/10.0 Aug 2014-Apr 2018 Bachelor of Engineering in Electronics & Instrumentation ... - 2021 Mar 17
... SOC Design using System Verilog, Embedded System On-Chip, Artificial Intelligence using DSP, UVM, Computer Architecture. SGSITS, Indore, MP, India - CGPA - 7.4/10.0 Aug 2014-Apr 2018 Bachelor of Engineering in Electronics & Instrumentation ... - 2021 Mar 17
Computer Vision, Deep Learning, Localization, LiDAR processing
Santa Clara, CA
... Skills Development: C++, Java, Python, Tensorflow, Keras, OpenCV, Pytorch, ROS, Gazebo, Javascript, MATLAB, React, Node, MongoDB, Verilog, MIPS Modeling and Analysis: Autodesk Fusion 360, CREO Parametric, Solidworks, Autodesk Inventor, APriori ... - 2021 Jan 25
... Skills Development: C++, Java, Python, Tensorflow, Keras, OpenCV, Pytorch, ROS, Gazebo, Javascript, MATLAB, React, Node, MongoDB, Verilog, MIPS Modeling and Analysis: Autodesk Fusion 360, CREO Parametric, Solidworks, Autodesk Inventor, APriori ... - 2021 Jan 25
Python, Java, SQL, AI, databases, Algorithm, Data Structures
San Jose, CA
... Spring 2020 (Computer Systems & Structure Coursework) Programming Language/Tools Used : Verilog, VCS Simulator • Designed & Verified functionality of Direct Mapped Cache for hits, misses of main memory addresses. Fall 2019 (Human Computer Interface ... - 2021 Jan 24
... Spring 2020 (Computer Systems & Structure Coursework) Programming Language/Tools Used : Verilog, VCS Simulator • Designed & Verified functionality of Direct Mapped Cache for hits, misses of main memory addresses. Fall 2019 (Human Computer Interface ... - 2021 Jan 24
Software Engineering Intern
San Jose, CA
... MongoDB • Operating System: OS X, Enterprise Linux, Ubuntu, Windows • Other technical skills: Android Application development, Verilog, Genism, PySpark, Numpy, TensorFlow, Git, OpenCV, Scikit, Tkinter, PyTesseract, SQLAlchemy, PyMongo PROFESSIONAL ... - 2021 Jan 20
... MongoDB • Operating System: OS X, Enterprise Linux, Ubuntu, Windows • Other technical skills: Android Application development, Verilog, Genism, PySpark, Numpy, TensorFlow, Git, OpenCV, Scikit, Tkinter, PyTesseract, SQLAlchemy, PyMongo PROFESSIONAL ... - 2021 Jan 20
Engineering Engineer
San Jose, CA
... at Omega Inc., 2010-2015 TECHNICAL SKILLS Programming languages: C++, C#, Python, TensorFlow Hardware languages: VHDL, Verilog, SystemVerilog, SystemC EDA tolls: Xilinx Vivado, Intel-Altera designing tools, Cadence Virtuoso Engineering software: ... - 2021 Jan 06
... at Omega Inc., 2010-2015 TECHNICAL SKILLS Programming languages: C++, C#, Python, TensorFlow Hardware languages: VHDL, Verilog, SystemVerilog, SystemC EDA tolls: Xilinx Vivado, Intel-Altera designing tools, Cadence Virtuoso Engineering software: ... - 2021 Jan 06
Electrical Engineering Student
Santa Clara, CA
... statements for components Assembly: Utilizing STM Discovery boards and ARM to program keypad, addressable LEDs, ADC/DAC converters, understanding stacks/recursion/pointers in Assembly FPGA/Verilog: Creating component blocks in Quartus Prime (ex. ... - 2020 Dec 23
... statements for components Assembly: Utilizing STM Discovery boards and ARM to program keypad, addressable LEDs, ADC/DAC converters, understanding stacks/recursion/pointers in Assembly FPGA/Verilog: Creating component blocks in Quartus Prime (ex. ... - 2020 Dec 23
Application Engineer II
Sunnyvale, CA
HARIKA RENDUCHINTALA +1-408-***-**** adivc7@r.postjobfree.com http://www.linkedin.com/in/harikarenduchintala PROFESSIONAL SUMMARY •2+ years of experience coding in Verilog and ASIC/CMOS Design. •Experience building Universal Verification Methodology ... - 2020 Dec 21
HARIKA RENDUCHINTALA +1-408-***-**** adivc7@r.postjobfree.com http://www.linkedin.com/in/harikarenduchintala PROFESSIONAL SUMMARY •2+ years of experience coding in Verilog and ASIC/CMOS Design. •Experience building Universal Verification Methodology ... - 2020 Dec 21