| Resume alert | Resumes 41 - 50 of 182 |
Assistant Design
North Hills, CA
... Pac-Man Game - FPGA CSUN March 2019 – Present • Designed a Pac-Man-esque game using Xilinx Zynq SoC PS2, VGA, and SRAM. • Created detail design sprites for the character, objects, and score using VHDL. • Implemented the play area using a control ... - 2019 Mar 30
... Pac-Man Game - FPGA CSUN March 2019 – Present • Designed a Pac-Man-esque game using Xilinx Zynq SoC PS2, VGA, and SRAM. • Created detail design sprites for the character, objects, and score using VHDL. • Implemented the play area using a control ... - 2019 Mar 30
Design Engineer,Embedded System, VLSI, Verification, Test, C, C++
Los Angeles, CA
... Bachelor of Science, Computer Engineering, Tehran, Iran May 2017 Thesis: Hardware Acceleration of Image Edge Detection on FPGA-SoC platform using OpenCL, demo: http://www-scf.usc.edu/~shababi/OpenCL.html WORK EXPERIENCE Hardware Design Engineer, ... - 2019 Jan 25
... Bachelor of Science, Computer Engineering, Tehran, Iran May 2017 Thesis: Hardware Acceleration of Image Edge Detection on FPGA-SoC platform using OpenCL, demo: http://www-scf.usc.edu/~shababi/OpenCL.html WORK EXPERIENCE Hardware Design Engineer, ... - 2019 Jan 25
Computer Engineering System
Los Angeles, CA
... SKILLS: Programming Languages: C++, C, Java Hardware Description Languages: System Verilog, Verilog, System C Scripting Languages: Python, Bash, Perl Verification Methodologies: UVM, FPGA Prototyping, Formal Verification, UPF PROJECTS: Coverage ... - 2019 Jan 23
... SKILLS: Programming Languages: C++, C, Java Hardware Description Languages: System Verilog, Verilog, System C Scripting Languages: Python, Bash, Perl Verification Methodologies: UVM, FPGA Prototyping, Formal Verification, UPF PROJECTS: Coverage ... - 2019 Jan 23
Hardware Engineer
Fullerton, CA
... • Implemented combinational and sequential circuits on FPGA using VHDL in Altium. • Drafted qualification documents, test plans, and test reports for quality assurance purposes. Technical Skills • Strong digital, analog and RF ICs fundamentals. ... - 2019 Jan 21
... • Implemented combinational and sequential circuits on FPGA using VHDL in Altium. • Drafted qualification documents, test plans, and test reports for quality assurance purposes. Technical Skills • Strong digital, analog and RF ICs fundamentals. ... - 2019 Jan 21
Software Engineer
Los Angeles, CA
... Virtual Theremin Winter 2018 Collaborated with a team of 3 students on Designing a device using FPGA and MicroBlaze written by C Created physical circuit using sonar module Implemented code creates sound has different ... - 2018 Dec 17
... Virtual Theremin Winter 2018 Collaborated with a team of 3 students on Designing a device using FPGA and MicroBlaze written by C Created physical circuit using sonar module Implemented code creates sound has different ... - 2018 Dec 17
Engineer Computer Engineering
Compton, CA
... Advanced Control Systems TCPIP Python 3.6 Course Projects Designed and implemented a traffic light controller using a FPGA board in Verilog Designed and implemented a digital clock in Verilog Hands on experience with standard electronics lab ... - 2018 Nov 15
... Advanced Control Systems TCPIP Python 3.6 Course Projects Designed and implemented a traffic light controller using a FPGA board in Verilog Designed and implemented a digital clock in Verilog Hands on experience with standard electronics lab ... - 2018 Nov 15
Electrical Engineering Design
Cypress, CA
... • Digital System Design - Collaborated and designed a three number digital lock using FPGA. Technical Skills • Electric/Electronic Circuits Theory • Microsoft Windows and Office • MATLAB • LTSpice • VHDL • EAGLE CAD Work Experience TECHNICIAN • ... - 2018 Oct 17
... • Digital System Design - Collaborated and designed a three number digital lock using FPGA. Technical Skills • Electric/Electronic Circuits Theory • Microsoft Windows and Office • MATLAB • LTSpice • VHDL • EAGLE CAD Work Experience TECHNICIAN • ... - 2018 Oct 17
Design Electrical Engineering
Los Angeles, CA
... Integrated the overall system and implemented it on Xilinx Artix-7 FPGA board. Full Custom Design of General Purpose 16-bit CPU February 2017 – April 2017 Designed a fully custom 32-bit 5 stage pipelined RISC processor with a 512bit SRAM in Cadence ... - 2018 Jul 17
... Integrated the overall system and implemented it on Xilinx Artix-7 FPGA board. Full Custom Design of General Purpose 16-bit CPU February 2017 – April 2017 Designed a fully custom 32-bit 5 stage pipelined RISC processor with a 512bit SRAM in Cadence ... - 2018 Jul 17
Engineer Electrical
Long Beach, CA
... ARM CPU” California State University Dominguez Hills Bachelor of Science Physics: Electrical Engineering 08/2011- 05/2016 Skills: Analog, Digital, High Speed, PCB layout, Computer Network, AVR, PIC microchip, ARM, NVIDIA Jetson Tx2, and FPGA. ... - 2018 Jun 13
... ARM CPU” California State University Dominguez Hills Bachelor of Science Physics: Electrical Engineering 08/2011- 05/2016 Skills: Analog, Digital, High Speed, PCB layout, Computer Network, AVR, PIC microchip, ARM, NVIDIA Jetson Tx2, and FPGA. ... - 2018 Jun 13
Electrical Engineering hardware firmware engineer
Los Angeles, CA
... analysis algorithm Advanced Driver Assistance System (ADAS) Project using EasySoC-1M Board Sep 2014 - Dec 2014 • Designed FPGA modules through Verilog HDL programming for sensor data processing • Programmed modules of data processing (filtering and ... - 2018 May 23
... analysis algorithm Advanced Driver Assistance System (ADAS) Project using EasySoC-1M Board Sep 2014 - Dec 2014 • Designed FPGA modules through Verilog HDL programming for sensor data processing • Programmed modules of data processing (filtering and ... - 2018 May 23