| Resume alert | Resumes 1 - 10 of 497 |
Design Verification Engineer
Sunnyvale, CA
Lushan Liu 408-***-**** ad42vq@r.postjobfree.com SKILLS Assembly, Verilog, SystemC, SystemVerilog, UVM, Cadence JasperGold, IMC coverage, C/C++, Java, Perl/Python, C Shell scripts, MakeFile Cadence Xcelium, Virtuoso, AMS, SPICE, Spectre, Verdi, ... - Apr 17
Lushan Liu 408-***-**** ad42vq@r.postjobfree.com SKILLS Assembly, Verilog, SystemC, SystemVerilog, UVM, Cadence JasperGold, IMC coverage, C/C++, Java, Perl/Python, C Shell scripts, MakeFile Cadence Xcelium, Virtuoso, AMS, SPICE, Spectre, Verdi, ... - Apr 17
Project Manager Team Members
Morgan Hill, CA
... • Managed all CL schedules and meeting/workshop cadence across all internal groups. E2OPEN, Foster City/Redwood City, California 2007 – 2010 Product Marketing Manager and Proposal Manager Maintained a library of all sales process deliverables needed ... - Mar 27
... • Managed all CL schedules and meeting/workshop cadence across all internal groups. E2OPEN, Foster City/Redwood City, California 2007 – 2010 Product Marketing Manager and Proposal Manager Maintained a library of all sales process deliverables needed ... - Mar 27
Design Engineer Circuit
Cupertino, CA
... Performed simulations using HSPICE and Spectre, schematic capture, layout with Cadence Virtuoso, and layout verification (contract position). 1/00-4/03: National Semiconductor, Santa Clara, CA Design Engineer, worked on design of ESD circuits and ... - Mar 23
... Performed simulations using HSPICE and Spectre, schematic capture, layout with Cadence Virtuoso, and layout verification (contract position). 1/00-4/03: National Semiconductor, Santa Clara, CA Design Engineer, worked on design of ESD circuits and ... - Mar 23
Project Manager Software Engineering
Santa Clara, CA
... • Texas Aug 2019 - Apr 2021 Worked in Agile Scrum team environment with high- tempo production cadence. • • Built flexible, reusable code and libraries for future use. Developed web platform back ends using Express and Ruby on nails frameworks. • • ... - Mar 18
... • Texas Aug 2019 - Apr 2021 Worked in Agile Scrum team environment with high- tempo production cadence. • • Built flexible, reusable code and libraries for future use. Developed web platform back ends using Express and Ruby on nails frameworks. • • ... - Mar 18
Social Media, Marketing Communications, Public Relations
San Jose, CA
... Senior PR Manager & Interim Communications Director, CADENCE DESIGN SYSTEMS San Jose CA, 2006 to 2009 • Working with communications and technology group leaders, achieved corporate approval of comprehensive corporate messaging strategies. • Affirmed ... - Mar 11
... Senior PR Manager & Interim Communications Director, CADENCE DESIGN SYSTEMS San Jose CA, 2006 to 2009 • Working with communications and technology group leaders, achieved corporate approval of comprehensive corporate messaging strategies. • Affirmed ... - Mar 11
Front End Field Engineering
Sunnyvale, CA
... and analysis, EMIR analysis, formal verification, simulation of the whole chip, including top level and block level, using Cadence tools o Participate in hardware-software, front-end-back-end architectural co-design and enhancement o Write Python ... - Mar 10
... and analysis, EMIR analysis, formal verification, simulation of the whole chip, including top level and block level, using Cadence tools o Participate in hardware-software, front-end-back-end architectural co-design and enhancement o Write Python ... - Mar 10
Supply Chain Program Manager
San Jose, CA
... Provide cadence re-alignment proposals based on re-calibrated durations to relieve overlapping schedules. Coordinate changes with multiple work centers to align the master schedule to the latest requests from Program Office. Maintain material and ... - Mar 06
... Provide cadence re-alignment proposals based on re-calibrated durations to relieve overlapping schedules. Coordinate changes with multiple work centers to align the master schedule to the latest requests from Program Office. Maintain material and ... - Mar 06
Mixed Signal Verification Engineer
Santa Clara, CA, 95050
... Well-versed with tools and simulators like Cadence-AMS Xcelium, Cadence ADE-L, Virtuoso Schematic Editor. Knowledge of scripting languages Perl and TCL, version control management tools and different OS. Knowledge of communication protocols like I2C ... - Feb 21
... Well-versed with tools and simulators like Cadence-AMS Xcelium, Cadence ADE-L, Virtuoso Schematic Editor. Knowledge of scripting languages Perl and TCL, version control management tools and different OS. Knowledge of communication protocols like I2C ... - Feb 21
Layout Designer Senior Staff Engineer
San Jose, CA
... Prize -Ultra Low Power 1M SRAM Development Oct 1986 Samsung Group Gold Technical Prize -Ultra Low Power 256K SRAM Development Tools: - Cadence Virtuoso(with Calibre) Education: Mar 1980 ~ Feb 1984 Sogang University (Seoul, Korea) BS (EE & Math) - Jan 27
... Prize -Ultra Low Power 1M SRAM Development Oct 1986 Samsung Group Gold Technical Prize -Ultra Low Power 256K SRAM Development Tools: - Cadence Virtuoso(with Calibre) Education: Mar 1980 ~ Feb 1984 Sogang University (Seoul, Korea) BS (EE & Math) - Jan 27
Electrical Engineering System Design
San Jose, CA, 95126
... TECHNICAL SKILLS Programming Language: C, Python, Verilog, C++ Operating System: Windows & Linux Software Tools: Cadence Virtuoso, Keil Micro vision, Xilinx Design Suite, Model Sim, Intel Quartus Prime, Prime Time, Design Vision, Xilinx Vivado. ... - Jan 10
... TECHNICAL SKILLS Programming Language: C, Python, Verilog, C++ Operating System: Windows & Linux Software Tools: Cadence Virtuoso, Keil Micro vision, Xilinx Design Suite, Model Sim, Intel Quartus Prime, Prime Time, Design Vision, Xilinx Vivado. ... - Jan 10