| Resume alert | Resumes 31 - 40 of 85 |
Sales Digital Marketing
Arlington, MA
... labor and product cost for fitting a better ROI model • Improve the email campaign by using A/B testing on the Salesloft email cadence response rate data • Introduce multi-criteria decision-making model to identify University Research labs (B2C) and ... - 2020 Jan 03
... labor and product cost for fitting a better ROI model • Improve the email campaign by using A/B testing on the Salesloft email cadence response rate data • Introduce multi-criteria decision-making model to identify University Research labs (B2C) and ... - 2020 Jan 03
Curriculum Developer/Instructional Designer/Technical Writer
Woburn, MA
... Cadence Design Systems, Chelmsford, MA 1997 -1998 SOLUTIONS ENGINEER • Contributed to the Deep Submicron (DSM) business unit’s floor planning, place & route, and timing analysis tools. Visited customer sites to analyze needs to enable appropriate ... - 2019 Sep 01
... Cadence Design Systems, Chelmsford, MA 1997 -1998 SOLUTIONS ENGINEER • Contributed to the Deep Submicron (DSM) business unit’s floor planning, place & route, and timing analysis tools. Visited customer sites to analyze needs to enable appropriate ... - 2019 Sep 01
Engineering Electrical
North Andover, MA
... Programming (VHDL, Verilog HDL, Python, C, C++, Assembly), Computer Aided Design (Quartus Prime II, ModelSIM, DxDesigner, Cadence, Allegro (Physical Viewer, PCB Designer, Design Entry), Pads Layout, AutoCAD, Lasi7, NI Multi-Sim, LT Spice, Micro ... - 2019 Apr 10
... Programming (VHDL, Verilog HDL, Python, C, C++, Assembly), Computer Aided Design (Quartus Prime II, ModelSIM, DxDesigner, Cadence, Allegro (Physical Viewer, PCB Designer, Design Entry), Pads Layout, AutoCAD, Lasi7, NI Multi-Sim, LT Spice, Micro ... - 2019 Apr 10
Manager Design
Lowell, MA
... Cadence Virtuoso Hardware Languages – Verilog/ VHDL using Altera Quartus- Altera Online Courses on FPGA ACADEMIC PROJECTS Robot Control Center, (Spring 2018) – Embedded Real Time Systems Microcontroller board which uses ARM Cortex-M3 CPU acts as a ... - 2019 Jan 01
... Cadence Virtuoso Hardware Languages – Verilog/ VHDL using Altera Quartus- Altera Online Courses on FPGA ACADEMIC PROJECTS Robot Control Center, (Spring 2018) – Embedded Real Time Systems Microcontroller board which uses ARM Cortex-M3 CPU acts as a ... - 2019 Jan 01
looking for better opportunities
Boston, MA
... EDUCATION RHODE ISLAND COLLEGE Providence, RI Bachelor for Science in Psychology September 2007 – December 2011 EXPERIENCE MCLEAN HOSPITAL Belmont, MA Executive Secretary of Internal Medicine Department January 2016 – Present Utilized EPIC Cadence ... - 2018 Aug 08
... EDUCATION RHODE ISLAND COLLEGE Providence, RI Bachelor for Science in Psychology September 2007 – December 2011 EXPERIENCE MCLEAN HOSPITAL Belmont, MA Executive Secretary of Internal Medicine Department January 2016 – Present Utilized EPIC Cadence ... - 2018 Aug 08
Social Media Manager
Lowell, MA
... 4-Bit Adder/Subtractor using Cadence EDA tool in 45nm CMOS process and Verilog for designing a DSP-RAM • Carried the analysis of various Full Adder Circuits in Cadence Virtuoso to find the low power design to be used in DSP-RAM. • Designed and ... - 2018 Jun 19
... 4-Bit Adder/Subtractor using Cadence EDA tool in 45nm CMOS process and Verilog for designing a DSP-RAM • Carried the analysis of various Full Adder Circuits in Cadence Virtuoso to find the low power design to be used in DSP-RAM. • Designed and ... - 2018 Jun 19
Analog design Engineer
Revere, MA
... stage error amplifier Calculated the parameters and draw the schematic and run the simulation in difference circumstances in Cadence Illinois Institute of Technology, Chicago, IL September 2013 – December 2014 VLSI Design and Synthesis of Adders– ... - 2018 Jun 05
... stage error amplifier Calculated the parameters and draw the schematic and run the simulation in difference circumstances in Cadence Illinois Institute of Technology, Chicago, IL September 2013 – December 2014 VLSI Design and Synthesis of Adders– ... - 2018 Jun 05
Software Engineering
Lowell, MA
... Architecture LANGUAGE & TECHNICAL SKILLS ● VLSI Design ● Verilog/VHDL ● Advanced Logic Design Software RYU, ONOS, Mininet, Cadence Virtuoso, Logic Works Languages Python3, C++, C, MATLAB, P4(basic) Software Tools Docker, Git, POSTMAN, Visual Studio, ... - 2018 Jun 02
... Architecture LANGUAGE & TECHNICAL SKILLS ● VLSI Design ● Verilog/VHDL ● Advanced Logic Design Software RYU, ONOS, Mininet, Cadence Virtuoso, Logic Works Languages Python3, C++, C, MATLAB, P4(basic) Software Tools Docker, Git, POSTMAN, Visual Studio, ... - 2018 Jun 02
Executive Assistant Manager
Quincy, MA
... 12/15 – 3/16 EPIC SOFTWARE TESTER / TDR ANALYST - OVERTURE PARTNERS (CONTRACT) Tested workstations and peripheral devices for EPIC Hyperspace clinical modules: inpatient, outpatient, ambulatory, and Cadence registration. Accurately recorded testing ... - 2018 Mar 16
... 12/15 – 3/16 EPIC SOFTWARE TESTER / TDR ANALYST - OVERTURE PARTNERS (CONTRACT) Tested workstations and peripheral devices for EPIC Hyperspace clinical modules: inpatient, outpatient, ambulatory, and Cadence registration. Accurately recorded testing ... - 2018 Mar 16
Sales Microsoft Office
Boston, MA
... distribution +2 million customers Executed markdown cadence for two large seasonal categories & Salon Z New York & Company, New York, NY Assistant Buyer Jan 2008 - Jan 2010 Maintained buy sheets, placed purchase orders, and tracked financial ... - 2018 Mar 08
... distribution +2 million customers Executed markdown cadence for two large seasonal categories & Salon Z New York & Company, New York, NY Assistant Buyer Jan 2008 - Jan 2010 Maintained buy sheets, placed purchase orders, and tracked financial ... - 2018 Mar 08