| Resume alert | Resumes 21 - 30 of 50 |
Design Engineer Electrical
Phoenix, AZ
... Graduation project - VLSI Implementation of Realistic Neural Networks: implementing an Analog ASIC, extensive Matlab simulations of big networks (with the extracted analog circuit's behavior). Participated in short analog courses and seminars over ... - 2017 Mar 30
... Graduation project - VLSI Implementation of Realistic Neural Networks: implementing an Analog ASIC, extensive Matlab simulations of big networks (with the extracted analog circuit's behavior). Participated in short analog courses and seminars over ... - 2017 Mar 30
Physical Design Engineer Intern
Tempe, AZ
... SUMMARY Electrical Engineering Graduate student specializing in Digital VLSI Design with a professional experience as Physical Design Engineer, designing standard-cells in 40nm process, looking for full-time position from April 2017 to enhance my ... - 2017 Mar 24
... SUMMARY Electrical Engineering Graduate student specializing in Digital VLSI Design with a professional experience as Physical Design Engineer, designing standard-cells in 40nm process, looking for full-time position from April 2017 to enhance my ... - 2017 Mar 24
Engineer Support
Phoenix, AZ
... Test Technician, GenRad 1984-1987 Tested and repair of the GenRad GR16/GR18 VLSI testers. This included functional and system level diagnosis and repair of new systems. Education Bachelors of Science, Electronic Engineering Technology (BSEET), DeVry ... - 2017 Mar 03
... Test Technician, GenRad 1984-1987 Tested and repair of the GenRad GR16/GR18 VLSI testers. This included functional and system level diagnosis and repair of new systems. Education Bachelors of Science, Electronic Engineering Technology (BSEET), DeVry ... - 2017 Mar 03
Research Assistant
Tempe, AZ
... C/C++ Verilog/VHDL Systems Modeling and Verification Model Checking UPPAAL/NuSMV Matlab Java CPS Testing and Monitoring Temporal Logic (LTL,MTL,TPTL) Latex Pascal Formal Methods and Modeling FPGA/VLSI CAD Education Ph.D. in Computer Science, Arizona ... - 2016 Nov 27
... C/C++ Verilog/VHDL Systems Modeling and Verification Model Checking UPPAAL/NuSMV Matlab Java CPS Testing and Monitoring Temporal Logic (LTL,MTL,TPTL) Latex Pascal Formal Methods and Modeling FPGA/VLSI CAD Education Ph.D. in Computer Science, Arizona ... - 2016 Nov 27
Engineer Electrical
Chandler, AZ
... Microelectronic Fabrication, Advanced Plasma Engineering, Technology CAD, VLSI Testing, VLSI Design. Dissertation Title: Fabrication and Electrical Characterization of AlGaN/GaN Heterostructure Devices. M.S. in Electrical Engineering (G.P.A. 3.78/4 ... - 2016 Aug 08
... Microelectronic Fabrication, Advanced Plasma Engineering, Technology CAD, VLSI Testing, VLSI Design. Dissertation Title: Fabrication and Electrical Characterization of AlGaN/GaN Heterostructure Devices. M.S. in Electrical Engineering (G.P.A. 3.78/4 ... - 2016 Aug 08
Design Engineer
Tempe, AZ
... Analog Integrated Circuits, VLSI Design, Digital System Circuits, CMOS Device Fabrication WORK EXPERIENCE ● Analog Mixed Signal Design Intern- TE Connectivity Summer'14, ASU, Supervisor: Phil McClay -Developed data acquisition routines (Installer ... - 2015 Jul 01
... Analog Integrated Circuits, VLSI Design, Digital System Circuits, CMOS Device Fabrication WORK EXPERIENCE ● Analog Mixed Signal Design Intern- TE Connectivity Summer'14, ASU, Supervisor: Phil McClay -Developed data acquisition routines (Installer ... - 2015 Jul 01
Design Engineering, SystemVerilog, HSPICE, STA, Perl, Cadence
Phoenix, AZ
... EDUCATION Master of Science in Electrical Engineering, Arizona State University, Tempe, AZ GPA: 3.58/4.0 May 2015 (Expected) Courses: Digital Systems and Circuits, VLSI Design, Advanced VLSI, Hardware Design and Verification Languages, Computer ... - 2015 Apr 01
... EDUCATION Master of Science in Electrical Engineering, Arizona State University, Tempe, AZ GPA: 3.58/4.0 May 2015 (Expected) Courses: Digital Systems and Circuits, VLSI Design, Advanced VLSI, Hardware Design and Verification Languages, Computer ... - 2015 Apr 01
Design Engineering
Chandler, AZ
... COMPUTER AIDED DESIGN FOR VLSI (CAD): ● Formulated Synthesis reports of a standard semi custom VLSI cell using Synopsys design vision. Varied design constraints such as area, frequency and clock to re optimize the design. Wrote Verilog IDCT (Inverse ... - 2014 Jun 25
... COMPUTER AIDED DESIGN FOR VLSI (CAD): ● Formulated Synthesis reports of a standard semi custom VLSI cell using Synopsys design vision. Varied design constraints such as area, frequency and clock to re optimize the design. Wrote Verilog IDCT (Inverse ... - 2014 Jun 25
Assistant Design
Tempe, AZ
... Studied Verilog and digital logic design (digital VLSI). Acted as a group leader on a project of digital circuit system design. Worked in a research course project about multi-cores communication and temperature control. Publications Xing Wei; ... - 2014 May 28
... Studied Verilog and digital logic design (digital VLSI). Acted as a group leader on a project of digital circuit system design. Worked in a research course project about multi-cores communication and temperature control. Publications Xing Wei; ... - 2014 May 28
Engineer Design
Chandler, AZ
... SUMMARY A Product Development / Technical Support / Testing Engineer with in-depth semiconductor physics knowledge and experience in Embedded Microcontroller Architectures, Flash Memories, VLSI CMOS mixed-signal devices, wafer / package assembly and ... - 2013 Oct 04
... SUMMARY A Product Development / Technical Support / Testing Engineer with in-depth semiconductor physics knowledge and experience in Embedded Microcontroller Architectures, Flash Memories, VLSI CMOS mixed-signal devices, wafer / package assembly and ... - 2013 Oct 04