| Resume alert | Resumes 41 - 50 of 50 |
Engineer Design
Tempe, AZ, 85281
... BACHELOR OF TECHNOLOGY IN ELECTRONICS & COMMUNICATIONS ENGINEERING AUG'02-MAY'06 Jawaharlal Nehru Technological University Aggregate: 86% Relevant Courses Advanced Analog Integrated Circuits, Analog to Digital Converters, VLSI Design, Digital ... - 2010 Jun 28
... BACHELOR OF TECHNOLOGY IN ELECTRONICS & COMMUNICATIONS ENGINEERING AUG'02-MAY'06 Jawaharlal Nehru Technological University Aggregate: 86% Relevant Courses Advanced Analog Integrated Circuits, Analog to Digital Converters, VLSI Design, Digital ... - 2010 Jun 28
Engineer Project Manager
Mesa, AZ, 85212
... VLSI TECHNOLOGY, INC. Tempe, AZ 1993 - 1997 Staff EDA Engineer Supported various design methodologies inside PCD, while performing the duties of the EDA Tools Engineer. Facilitated standardization of design practices while organizing the existing ... - 2010 Jun 23
... VLSI TECHNOLOGY, INC. Tempe, AZ 1993 - 1997 Staff EDA Engineer Supported various design methodologies inside PCD, while performing the duties of the EDA Tools Engineer. Facilitated standardization of design practices while organizing the existing ... - 2010 Jun 23
Design Electrical
Tempe, AZ, 85284
... Introduction to VLSI, Fall 2006 o Design, Simulation and Layout of a 4-Bit Accumulator Using Cadence and Hspice . Feedback Control, Fall 2006 o Analysis and Simulation of a DC Motor Using Matlab and Simulink . Analog VLSI, Spring 2007 o Design, ... - 2010 Jun 18
... Introduction to VLSI, Fall 2006 o Design, Simulation and Layout of a 4-Bit Accumulator Using Cadence and Hspice . Feedback Control, Fall 2006 o Analysis and Simulation of a DC Motor Using Matlab and Simulink . Analog VLSI, Spring 2007 o Design, ... - 2010 Jun 18
Design Electrical
Tempe, AZ, 85281
... Programming languages C/C++, Verilog HDL, HTML, MATLAB RELEVANT COURSEWORK Digital Systems & Circuits Advanced Analog Integrated Circuits Design of Engineering Experiments VLSI Design Analog-to-Digital Converters Advanced Silicon Processing Computer ... - 2010 Apr 19
... Programming languages C/C++, Verilog HDL, HTML, MATLAB RELEVANT COURSEWORK Digital Systems & Circuits Advanced Analog Integrated Circuits Design of Engineering Experiments VLSI Design Analog-to-Digital Converters Advanced Silicon Processing Computer ... - 2010 Apr 19
Technician Maintenance
Mesa, AZ, 85207
... maintain records and reports as required Coordinate activities with peers, supervisor(s) and customers to minimize equipment downtime and interruptions VLSI Technologies Chandler, AZ November 1993 - November 1997 Maintenance Technician Perform ... - 2010 Mar 09
... maintain records and reports as required Coordinate activities with peers, supervisor(s) and customers to minimize equipment downtime and interruptions VLSI Technologies Chandler, AZ November 1993 - November 1997 Maintenance Technician Perform ... - 2010 Mar 09
Design Engineering
Tempe, AZ, 85281
... COURSE WORK: Fall'07: Digital Systems and Circuits, Analog Integrated Circuits, Fibre Optics, Spring'08: VLSI Design, Advanced Analog Integrated Circuits, Communication Networks Summer'08: Enterprise Modelling Fall'08: Semiconductor Optoelectronics, ... - 2010 Mar 09
... COURSE WORK: Fall'07: Digital Systems and Circuits, Analog Integrated Circuits, Fibre Optics, Spring'08: VLSI Design, Advanced Analog Integrated Circuits, Communication Networks Summer'08: Enterprise Modelling Fall'08: Semiconductor Optoelectronics, ... - 2010 Mar 09
Data Project Manager
Gilbert, AZ, 85233
... Fortes, “A fast VLSI-efficient self-routing permutation network,” IEEE Transactions on Computers, vol. 44, pp. 448-453, March 1995. Conference Proceedings 1. Hidayet Ozgur Sanli and Hasan Çam, ``Joint Coverage Scheduling and Identity Management for ... - 2010 Mar 09
... Fortes, “A fast VLSI-efficient self-routing permutation network,” IEEE Transactions on Computers, vol. 44, pp. 448-453, March 1995. Conference Proceedings 1. Hidayet Ozgur Sanli and Hasan Çam, ``Joint Coverage Scheduling and Identity Management for ... - 2010 Mar 09
Engineer Design
Tempe, AZ, 85281
Satendra Kumar Maurya *** ***** ******* ****, *** 164 Tempe, AZ 85281 480-***-**** abno1g@r.postjobfree.com OBJECTIVE Seeking an opportunity for full-time in the challenging field of Digital & VLSI circuit Design together with engaging myself in a ... - 2010 Mar 09
Satendra Kumar Maurya *** ***** ******* ****, *** 164 Tempe, AZ 85281 480-***-**** abno1g@r.postjobfree.com OBJECTIVE Seeking an opportunity for full-time in the challenging field of Digital & VLSI circuit Design together with engaging myself in a ... - 2010 Mar 09
Design Engineer
Tempe, AZ, 85281
... CGPA - 8.8/10.0 RELEVANT COURSEWORK: Advanced VLSI Design Computer Architecture Analog to Digital Convertors CMOS VLSI Design Semiconductor Device Theory Advanced Analog Integrated Circuits Digital Systems and Circuits ASIC Design and VHDL Design of ... - 2010 Mar 09
... CGPA - 8.8/10.0 RELEVANT COURSEWORK: Advanced VLSI Design Computer Architecture Analog to Digital Convertors CMOS VLSI Design Semiconductor Device Theory Advanced Analog Integrated Circuits Digital Systems and Circuits ASIC Design and VHDL Design of ... - 2010 Mar 09
Electrical Engineer
Tempe, AZ, 85281
... Independent Research Study , Arizona State University-Freescale Semiconductor , Tempe Oct08-Dec08 o Design a VLSI Phase-Locked Loop circuit for data recovery for a 1.6Gb/s high-speed I/O circuits. o Design Specs: Input reference clock frequency ... - 2009 Jan 02
... Independent Research Study , Arizona State University-Freescale Semiconductor , Tempe Oct08-Dec08 o Design a VLSI Phase-Locked Loop circuit for data recovery for a 1.6Gb/s high-speed I/O circuits. o Design Specs: Input reference clock frequency ... - 2009 Jan 02