| Distance: | Resume alert | Resumes 201 - 210 of 5987 |
Recent computer science graduate seeking entry level opportunities
Levittown, PA
... AutoCAD Experience in: Tableau, Java/JavaScript, C/C++, Verilog, SQL, Arduino, VMware, ROS, MongoDB Fluent in: English, French, and Gujarati; Beginner in: Spanish PROJECTS Stock Market (Python) • Used yahoo finance API to gather historical data on a ... - 2024 Sep 22
... AutoCAD Experience in: Tableau, Java/JavaScript, C/C++, Verilog, SQL, Arduino, VMware, ROS, MongoDB Fluent in: English, French, and Gujarati; Beginner in: Spanish PROJECTS Stock Market (Python) • Used yahoo finance API to gather historical data on a ... - 2024 Sep 22
Social Media Quality Assurance
Raleigh, NC, 27603
... Used VCS simulator and Synplicity for Verilog design and test. Hands on optical/electronics testing and characterizing. Perform Optical transceiver link budget, sensitivity, characterizing different types of fiber, etc. Involved in designing the ... - 2024 Sep 16
... Used VCS simulator and Synplicity for Verilog design and test. Hands on optical/electronics testing and characterizing. Perform Optical transceiver link budget, sensitivity, characterizing different types of fiber, etc. Involved in designing the ... - 2024 Sep 16
Data Engineer C++
New York City, NY
... 767 BTECH in Computer Science and Engineering, SASTRA University Jun2016 - Jun2020 CGPA:7.67 SKILLS Languages C,C++,python,verilog,vhdl,system verilog,ARM assembly,RISCV assembly,TCL,unix Methodologies OOPS,agile,scrum Databases MongoDB,MySql,NEO4J ... - 2024 Sep 16
... 767 BTECH in Computer Science and Engineering, SASTRA University Jun2016 - Jun2020 CGPA:7.67 SKILLS Languages C,C++,python,verilog,vhdl,system verilog,ARM assembly,RISCV assembly,TCL,unix Methodologies OOPS,agile,scrum Databases MongoDB,MySql,NEO4J ... - 2024 Sep 16
Functional Safety Scrum Master
Dublin, OH
... Emulators: Wind power ICE and Lauterbach, Green Hills Multi Debugger ●FPGA/CPLD/Languages/ Tools: CY-128 P84 125JC,VHDL,VERILOG,Wrap 6.0 ●FPGA /CPLD Interfaces: Transceivers, SMA and FMC connectors ●H/W Analyzers: Tektronix, Oscilloscope and PFA ... - 2024 Sep 12
... Emulators: Wind power ICE and Lauterbach, Green Hills Multi Debugger ●FPGA/CPLD/Languages/ Tools: CY-128 P84 125JC,VHDL,VERILOG,Wrap 6.0 ●FPGA /CPLD Interfaces: Transceivers, SMA and FMC connectors ●H/W Analyzers: Tektronix, Oscilloscope and PFA ... - 2024 Sep 12
C/C++, C#, python, html, javascript, verlog
Quan 12, 71500, Vietnam
... Technology 2021 GPA: 7.75/10 Python javascript Verilog C/C++ C# html English Japanese Expertise Language Image Classification Program with Deep Learning Describe: image classification program in Python using a self-designed deep learning network. ... - 2024 Sep 11
... Technology 2021 GPA: 7.75/10 Python javascript Verilog C/C++ C# html English Japanese Expertise Language Image Classification Program with Deep Learning Describe: image classification program in Python using a self-designed deep learning network. ... - 2024 Sep 11
C++ Engineer Ii
Palo Alto, CA
... SKILLS Programming Languages: C/C++, Python, Java, OpenMP, Perl, CUDA Other Languages: Verilog, System Verilog, UVM, CHISEL (Scala-based Design language) RAHUL NAYAR ***********@*****.*** · 608-***-**** · https://www.linkedin.com/in/rrahulnayar Page ... - 2024 Sep 11
... SKILLS Programming Languages: C/C++, Python, Java, OpenMP, Perl, CUDA Other Languages: Verilog, System Verilog, UVM, CHISEL (Scala-based Design language) RAHUL NAYAR ***********@*****.*** · 608-***-**** · https://www.linkedin.com/in/rrahulnayar Page ... - 2024 Sep 11
Electrical Engineer
Washougal, WA
... RTL design/verification experience Expertise in Verilog, VHDL and SystemVerilog RTL design. Micro-architecture, implementation and testing of custom IP blocks Third party IP integration and verification (UPF, IP-Xact register and document generation ... - 2024 Sep 10
... RTL design/verification experience Expertise in Verilog, VHDL and SystemVerilog RTL design. Micro-architecture, implementation and testing of custom IP blocks Third party IP integration and verification (UPF, IP-Xact register and document generation ... - 2024 Sep 10
Embedded Systems Design
Quan 9, 71200, Vietnam
C E R T I F I C A T E S C A R E E R OBJECTIVE Become financially free, stable career in the industry with a respectable position S T R E NGTHS HOBBIES P ROJECT S K I L L S C Programming Embedded Software Verilog code L A NGUAGE English Japanese ... - 2024 Sep 09
C E R T I F I C A T E S C A R E E R OBJECTIVE Become financially free, stable career in the industry with a respectable position S T R E NGTHS HOBBIES P ROJECT S K I L L S C Programming Embedded Software Verilog code L A NGUAGE English Japanese ... - 2024 Sep 09
Data Center Project Management
Naperville, IL
... Design/Simulation Linux CI/CD Automation 8051, 68000, 68332, 68360 Vendor Negotiation C language Exchange Protocols System Verilog VHDL Modelsim Questasim Jenkins Ethernet People Networking Assembly languages Vivado SOC/ASIC Design Windows TCP/IP ... - 2024 Sep 08
... Design/Simulation Linux CI/CD Automation 8051, 68000, 68332, 68360 Vendor Negotiation C language Exchange Protocols System Verilog VHDL Modelsim Questasim Jenkins Ethernet People Networking Assembly languages Vivado SOC/ASIC Design Windows TCP/IP ... - 2024 Sep 08
Software Engineer C++
Oviedo, FL
... SKILLS & ABILITIES Object oriented language: C/C++ Multi threaded programming RTOS, Micro processor “ARM cortex M” Parallel programming “MPI, open MP, CUDA” HDL Language: Verilog, system Verilog Emulation platform: VELOCE Scripting languages: Perl, ... - 2024 Sep 04
... SKILLS & ABILITIES Object oriented language: C/C++ Multi threaded programming RTOS, Micro processor “ARM cortex M” Parallel programming “MPI, open MP, CUDA” HDL Language: Verilog, system Verilog Emulation platform: VELOCE Scripting languages: Perl, ... - 2024 Sep 04