| Distance: | Resume alert | Resumes 221 - 230 of 5893 |
Product Marketing Go-To-Market
Las Vegas, NV
... Google Analytics Product: Jama Connect, Jira, Monday Wireframe-Design: Mural, Miro, Figma Engineering: C/C++, Python, VHDL/Verilog, MATLAB, ModelSim, REST Services, Docker, CI/CD Pipeline, Linux, GitHub • Hardware: Oscilloscope, Logic Analyzer, ... - 2024 Oct 07
... Google Analytics Product: Jama Connect, Jira, Monday Wireframe-Design: Mural, Miro, Figma Engineering: C/C++, Python, VHDL/Verilog, MATLAB, ModelSim, REST Services, Docker, CI/CD Pipeline, Linux, GitHub • Hardware: Oscilloscope, Logic Analyzer, ... - 2024 Oct 07
Analog IC Design
Ortega, CA, 95014
... MATLAB & Simulink, PCB Design tools Oscilloscopes, SMU, TLP system, VNA, Signal/Spectral Analyzer, PCB assembly tools C++, C, Verilog, Python, MATLAB, LaTeX, Microsoft office tools, Windows, Linux INTERNSHIP Student Technical Intern (IO/ESD) NXP ... - 2024 Oct 07
... MATLAB & Simulink, PCB Design tools Oscilloscopes, SMU, TLP system, VNA, Signal/Spectral Analyzer, PCB assembly tools C++, C, Verilog, Python, MATLAB, LaTeX, Microsoft office tools, Windows, Linux INTERNSHIP Student Technical Intern (IO/ESD) NXP ... - 2024 Oct 07
Hardware Engineer
San Jose, CA, 95112
John Joseph Carrillo San Jose, California ***** Qualifications Summary: Dedicated and results-driven Lead Hardware Engineer with expertise in PCB Design, PCIe, ASIC/SOC devices, Verilog RTL, FPGA Design, Encoding, Debugging, and Emulation. ... - 2024 Oct 05
John Joseph Carrillo San Jose, California ***** Qualifications Summary: Dedicated and results-driven Lead Hardware Engineer with expertise in PCB Design, PCIe, ASIC/SOC devices, Verilog RTL, FPGA Design, Encoding, Debugging, and Emulation. ... - 2024 Oct 05
Pcb Design High School
Bengaluru, Karnataka, India
... Tools :Modelsim 10.1c, Cadence virtuoso 6.2, Xilinx ISE 8.1i Language : Verilog Description : Our project goal is to select an appropriate approximate compressor which is a basic building block of 8*8 multiplier for multimedia application. 2. ... - 2024 Oct 03
... Tools :Modelsim 10.1c, Cadence virtuoso 6.2, Xilinx ISE 8.1i Language : Verilog Description : Our project goal is to select an appropriate approximate compressor which is a basic building block of 8*8 multiplier for multimedia application. 2. ... - 2024 Oct 03
Software Developer Electrical Engineering
San Antonio, TX
... (on VGA) (Video) ● Integrated a FPGA Nexys A-7 Board ● Configured buttons and developed front end and back end ● Utilized Verilog & Assembly CivicCapture ● A wearable camera that would activate after a specific threshold was reached ● Created PCB ... - 2024 Sep 30
... (on VGA) (Video) ● Integrated a FPGA Nexys A-7 Board ● Configured buttons and developed front end and back end ● Utilized Verilog & Assembly CivicCapture ● A wearable camera that would activate after a specific threshold was reached ● Created PCB ... - 2024 Sep 30
Team Member Field Service
Boynton Beach, FL
... Experience with software programs ORCAD P-Spice, WINSPICE, VERILOG, LASI, MATLAB, NI LABVIEW, AUTOCAD, Microsoft Windows Operating Systems and Servers, Microsoft Office Professional Suite, Unix Operating System and Servers. Possess extensive ... - 2024 Sep 27
... Experience with software programs ORCAD P-Spice, WINSPICE, VERILOG, LASI, MATLAB, NI LABVIEW, AUTOCAD, Microsoft Windows Operating Systems and Servers, Microsoft Office Professional Suite, Unix Operating System and Servers. Possess extensive ... - 2024 Sep 27
Embeded system
Quan Thu Duc, 71300, Vietnam
... Languages: C++, Python, Verilog, assembly MIPS 5/ 2023 - 7/ 2023 DOOR LOCK USING FACE RECOGNITION Use a camera to catch face, when face recognition confirms the user's identity, raspberry will send a signal to the electronic lock to unlock the door. ... - 2024 Sep 25
... Languages: C++, Python, Verilog, assembly MIPS 5/ 2023 - 7/ 2023 DOOR LOCK USING FACE RECOGNITION Use a camera to catch face, when face recognition confirms the user's identity, raspberry will send a signal to the electronic lock to unlock the door. ... - 2024 Sep 25
Python Developer Automation Engineer
Glendale Heights, IL
... MS-SQL Server 2015/2008, MS Access Non-Scripting Languages: XLST Version Control Tools: Git, Bitbucket Other Technologies: Matlab, Multisim, Cadence, Ansys HFSS, HDL, Verilog HDL, Simulink, SciPy, Matplotlib, Pandas, NumPy, OpenCV, MS Office. ... - 2024 Sep 25
... MS-SQL Server 2015/2008, MS Access Non-Scripting Languages: XLST Version Control Tools: Git, Bitbucket Other Technologies: Matlab, Multisim, Cadence, Ansys HFSS, HDL, Verilog HDL, Simulink, SciPy, Matplotlib, Pandas, NumPy, OpenCV, MS Office. ... - 2024 Sep 25
Computer Engineering Product Development
Orlando, FL
... Matlab, Simulink, and STK ●Software and IDE used: IBM DOORS and Windchill PLM, AutoCad, DreamWeaver, Jira, Xcode and Atom, Verilog ●Database Management: SQL, NoSQL (MongoDB, DynamoDB) ●Amazon Web Services (AWS): EC2, S3, Lambda, RDS, CloudFormation, ... - 2024 Sep 23
... Matlab, Simulink, and STK ●Software and IDE used: IBM DOORS and Windchill PLM, AutoCad, DreamWeaver, Jira, Xcode and Atom, Verilog ●Database Management: SQL, NoSQL (MongoDB, DynamoDB) ●Amazon Web Services (AWS): EC2, S3, Lambda, RDS, CloudFormation, ... - 2024 Sep 23
C++ Software Engineer
Huntsville, AL
... C++, C# Experienced in the following software languages and software tools: oVisual C++ 6.0, C#.Net, Java, Visual Basic.Net, Python oVHDL, Verilog, Intel QuartusPrime, ModelSim, AMD Vivado oPSPICE, MATLAB, MATHCAD, oRF Simulation program software. ... - 2024 Sep 23
... C++, C# Experienced in the following software languages and software tools: oVisual C++ 6.0, C#.Net, Java, Visual Basic.Net, Python oVHDL, Verilog, Intel QuartusPrime, ModelSim, AMD Vivado oPSPICE, MATLAB, MATHCAD, oRF Simulation program software. ... - 2024 Sep 23