Electrical Engineer Fpga

Rami Attas

***.******* *********@*****.***

Electrical Engineer and Senior FPGA Engineer specializing in the design, implementation and testing of complex systems including board design PCB.

Experience on FPGA design in System-Verilog.

Proficient in Writing / Defining HW-SW interfaces.

Occupational Experience:

2009-2025 Senior FPGA Engineer (ElSpec WizeDsp DSPG Enertec Korentec)

Responsibility for all stages of development starting from the specification of requirements including product characterization, writing code, Synthesis, STA.

Design and implementation of a spatial imaging system (LIDAR) in the XCZU9EG-2FFVB1156I XILINX FPGA Virtex component, using a VIDEO interface (CSI2-MIPI)

Responsibility for testing by test bench program and by chip-scope. Lab equipment: Logical analyzer and oscilloscope.

Implementation a neuron with multiple synapses by RTL coding using System Verilog for the purpose of creating a neural network (signal processing algorithm).

Monitoring and control using the Timing constraints results report.

Connecting MAC to PHY in FPGA devices for Internet connection.

Designing IP_CORE ARBITER GENERIC AND SYNCHRONOUS for FPGA and ASIC.

Programming in Verilog a simulator for GPS receiver and simulation of the code using ModelSim.

Testing the design in a laboratory with dedicated tools ChipScope Signal-Tap.

System upgrade after extensive research of existing design, adding new features and integrating them into the software.

Designing a board containing “DDR MEMORY” connected to “STRATIX ALTERA FPGA” operating at high frequency (SERDES).

2007 – 2009 Head of Project - Opgal Company

Characterization planning and sketching in ORCAD- (BOARD DESIGN) a board containing DSP TMS320DM6437 TI DaVinci, Lattice FPGA XP2, DDR MEMORY and FLASH MEMORY for video image processing.

Characterization and programming by VHDL the connectivity to DSP via FPGA.

Simulation in Modelsim

Training the software team on the system.

Education: Electronics Engineer and Business Manager for engineers Graduated from the Technion

Languages: Hebrew, English, French

Programming: System Verilog, Verilog, VHDL, C

VLSI SoC clock/voltage domain crossing, DFT,

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