| Resume alert | Resumes 61 - 70 of 448 |
Engineer Electrical
San Jose, CA
... University (India) RELEVANT COURSES Digital System Design and Synthesis, ASIC CMOS Design, High Speed CMOS Circuits, SoC Design and Verification with System Verilog, Advance Computer Architecture, Design of CMOS Digital Integrated Circuits. ... - 2019 May 14
... University (India) RELEVANT COURSES Digital System Design and Synthesis, ASIC CMOS Design, High Speed CMOS Circuits, SoC Design and Verification with System Verilog, Advance Computer Architecture, Design of CMOS Digital Integrated Circuits. ... - 2019 May 14
Design Engineer Engineering
San Jose, CA, 95125
... PROFESSIONAL EXPERIENCE Chronological: 1992 - 2004 Exemplar Logic FPGA EDA tool box for synthesis simulation of Verilog VHDL variants. XNF and CLB with LUT optimization. Mentor Graphics Corp, Conexant MindSpeed, AMD NVD. Finite state machine,FSM ... - 2019 Apr 28
... PROFESSIONAL EXPERIENCE Chronological: 1992 - 2004 Exemplar Logic FPGA EDA tool box for synthesis simulation of Verilog VHDL variants. XNF and CLB with LUT optimization. Mentor Graphics Corp, Conexant MindSpeed, AMD NVD. Finite state machine,FSM ... - 2019 Apr 28
Manufacturing Engineer Manager
San Jose, CA
... Skills: Languages: C++, HTML, Java Script, CSS, Verilog, Python and MATLAB, and knowledge about Microsoft office. CAD Tools: Codeblocks, Visual Studio, MATLAB, LT Spice MS Office Products. Engineering tools: LTSpice, Diptrace. Oscilloscope, Digital ... - 2019 Apr 25
... Skills: Languages: C++, HTML, Java Script, CSS, Verilog, Python and MATLAB, and knowledge about Microsoft office. CAD Tools: Codeblocks, Visual Studio, MATLAB, LT Spice MS Office Products. Engineering tools: LTSpice, Diptrace. Oscilloscope, Digital ... - 2019 Apr 25
Electrical Engineering Design
San Jose, CA
... Experienced in ASIC Design Flow, Verilog, CDC, System Verilog, UVM, C and Linux. EDUCATION The George Washington University, Washington, DC May 2018 Master of Science in Electrical Engineering, GPA:3.55/4.0 Relevant Courses: VLSI/ASIC Design, ... - 2019 Apr 05
... Experienced in ASIC Design Flow, Verilog, CDC, System Verilog, UVM, C and Linux. EDUCATION The George Washington University, Washington, DC May 2018 Master of Science in Electrical Engineering, GPA:3.55/4.0 Relevant Courses: VLSI/ASIC Design, ... - 2019 Apr 05
Software Developer
San Jose, CA
... Management, Marketing, Accounting & Enterprise Finance, Global Business Java, JavaScript, Python, C/C++, HTML, CSS, Verilog, Valgrind, GDB, Unix, Matlab, LaTeX, Git, Vim, Linux, Jupyter Notebook, Windows, iOS Microsoft Office, Excel, Photoshop ... - 2019 Apr 03
... Management, Marketing, Accounting & Enterprise Finance, Global Business Java, JavaScript, Python, C/C++, HTML, CSS, Verilog, Valgrind, GDB, Unix, Matlab, LaTeX, Git, Vim, Linux, Jupyter Notebook, Windows, iOS Microsoft Office, Excel, Photoshop ... - 2019 Apr 03
Electrical Engineer Engineering
San Jose, CA
... Verilog, AutoCAD Software MATLAB, SPICE Software Mastery of Microsoft Office programs (Word, Excel, PowerPoint) Comfortable working in both Microsoft Windows 10 and Mac OS X Installing and hands-on repairing techniques & Technical troubleshooting’s. ... - 2019 Mar 25
... Verilog, AutoCAD Software MATLAB, SPICE Software Mastery of Microsoft Office programs (Word, Excel, PowerPoint) Comfortable working in both Microsoft Windows 10 and Mac OS X Installing and hands-on repairing techniques & Technical troubleshooting’s. ... - 2019 Mar 25
Engineer Software
Sunnyvale, CA
... Zestful to take up any innovative work extensive knowledge in system verilog SCHOLASTIC ACHIEVEMENTS: ●Nominated as one of the 50 “Samsung Heroes” amongst the employees from all over the world in Samsung yearly nominations(2011) ●Awarded special ... - 2019 Mar 04
... Zestful to take up any innovative work extensive knowledge in system verilog SCHOLASTIC ACHIEVEMENTS: ●Nominated as one of the 50 “Samsung Heroes” amongst the employees from all over the world in Samsung yearly nominations(2011) ●Awarded special ... - 2019 Mar 04
Manager Software Engineer
Fremont, CA
... Computer Simulation of Easy VL language: Implemented a simulation software using C++ to simulate Easy VL language which is similar to Verilog. AWARDS AND ACCOMPLISHMENTS Received “Employee SPOT Award” for delivering the high priority late task on ... - 2019 Feb 13
... Computer Simulation of Easy VL language: Implemented a simulation software using C++ to simulate Easy VL language which is similar to Verilog. AWARDS AND ACCOMPLISHMENTS Received “Employee SPOT Award” for delivering the high priority late task on ... - 2019 Feb 13
Electrical Engineering Design,Test,Characterization,Validation
San Jose, CA
... Programming: C, HTML, CSS, PL/SQL, MySQL, Java, Python, Verilog Software: MATLAB, Simulink, PSpice, VSS, AWR, Virtual Photonics, Microwave Office, SAP (BIBO), Weka Devices: Spectrum Analyzer, Vector Network Analyzer, Calibration Kit (E-Cal, SOLT), ... - 2019 Feb 13
... Programming: C, HTML, CSS, PL/SQL, MySQL, Java, Python, Verilog Software: MATLAB, Simulink, PSpice, VSS, AWR, Virtual Photonics, Microwave Office, SAP (BIBO), Weka Devices: Spectrum Analyzer, Vector Network Analyzer, Calibration Kit (E-Cal, SOLT), ... - 2019 Feb 13
Electrical Engineer Engineering
San Jose, CA
... Core Technologies Software Microsoft Word, Excel, PowerPoint, LTspice, DipTrace, MATLAB, C++, Python, Xilinx Verilog Design, FPGA Design, Microprocessor Programing (M0+) and Assembly Language Programing, AutoCAD, Assembly Language Hardware PID, ... - 2019 Jan 22
... Core Technologies Software Microsoft Word, Excel, PowerPoint, LTspice, DipTrace, MATLAB, C++, Python, Xilinx Verilog Design, FPGA Design, Microprocessor Programing (M0+) and Assembly Language Programing, AutoCAD, Assembly Language Hardware PID, ... - 2019 Jan 22