| Resume alert | Resumes 81 - 90 of 128 |
Design Engineering
Los Angeles, CA
... 8.1 / 10 TECHNICAL SKILLS: Programming Languages: Verilog, Xilinx VHDL, C Applications: MS office, Cadence, LTspice, MATLAB COURSE LIST FALL 2011: EE-477L Digital CMOS Integrated Circuits EE- 457 Computer Organization EE- 479 Analysis of Analog CMOS ... - 2013 Jan 01
... 8.1 / 10 TECHNICAL SKILLS: Programming Languages: Verilog, Xilinx VHDL, C Applications: MS office, Cadence, LTspice, MATLAB COURSE LIST FALL 2011: EE-477L Digital CMOS Integrated Circuits EE- 457 Computer Organization EE- 479 Analysis of Analog CMOS ... - 2013 Jan 01
Design Project
Los Angeles, CA
... Softwares: Mathlab Hardware languages: Verilog (Case study: Alarm Clock), VHDL (Case Study: FIFO) Fpga Design Methodology: Introduction to Programmable Logic, Xilinx FPGA Families, Design Methodology, Design entry, Verification, Synthesis, ... - 2013 Jan 01
... Softwares: Mathlab Hardware languages: Verilog (Case study: Alarm Clock), VHDL (Case Study: FIFO) Fpga Design Methodology: Introduction to Programmable Logic, Xilinx FPGA Families, Design Methodology, Design entry, Verification, Synthesis, ... - 2013 Jan 01
Electrical Engineering
Los Angeles, CA
... SKILLS Languages: HTML, PHP, JavaScript, C, C++, and Verilog. Software: MATLAB, PSpice, MS Office Suite, Adobe Photoshop. PROJECTS VO2 Max Estimation, 2012-Current Directed a team tasked with utilizing the Android platform to adapt the YMCA protocol ... - 2013 Jan 01
... SKILLS Languages: HTML, PHP, JavaScript, C, C++, and Verilog. Software: MATLAB, PSpice, MS Office Suite, Adobe Photoshop. PROJECTS VO2 Max Estimation, 2012-Current Directed a team tasked with utilizing the Android platform to adapt the YMCA protocol ... - 2013 Jan 01
Design Electrical
Los Angeles, CA
... Education University of Southern California, GPA: 3.73 Degree Expected 5/14 Bachelor of Science in Electrical Engineering Los Angeles, CA Technical Expertise Languages: C/C++, Matlab, Ruby (Basic), Objective C (Basic), Verilog, HTML, CSS Tools: ROS ... - 2013 Jan 01
... Education University of Southern California, GPA: 3.73 Degree Expected 5/14 Bachelor of Science in Electrical Engineering Los Angeles, CA Technical Expertise Languages: C/C++, Matlab, Ruby (Basic), Objective C (Basic), Verilog, HTML, CSS Tools: ROS ... - 2013 Jan 01
Engineer Design
NORTH HOLLYWOOD, CA, 91606
... Tools/Skills: • Verilog HDL, VHDL, ORCAD for schematic capture, Cadence Allegro for layout, Pspice, Concept HDL, Viewlogic, Pads Logic, FPGAs,CPLD, PCB, Modelsim/Verilog-XL for digital simulation, C programming. Synchronus serial communication, PCI ... - 2012 Dec 26
... Tools/Skills: • Verilog HDL, VHDL, ORCAD for schematic capture, Cadence Allegro for layout, Pspice, Concept HDL, Viewlogic, Pads Logic, FPGAs,CPLD, PCB, Modelsim/Verilog-XL for digital simulation, C programming. Synchronus serial communication, PCI ... - 2012 Dec 26
Customer Service Electrical
Saugus, CA, 91350
... Fiber Communications, Power Electronic Systems, Microcontroller Interfacing, C Programming Software: MATLAB, Simulink, Xilinx/Verilog, Cadence Virtuoso, Visual Studio, C++, PSPICE, LabView, MPLAB, Excel, Word, & Powerpoint Hardware: HP8590A Spectrum ... - 2012 Dec 09
... Fiber Communications, Power Electronic Systems, Microcontroller Interfacing, C Programming Software: MATLAB, Simulink, Xilinx/Verilog, Cadence Virtuoso, Visual Studio, C++, PSPICE, LabView, MPLAB, Excel, Word, & Powerpoint Hardware: HP8590A Spectrum ... - 2012 Dec 09
Engineer Design
Moorpark, CA, 93021
... Expert in Verilog, reliable FPGA/ASIC design and verification. Principle Engineer 1991 - 12/3/2011 California Institute of Technology - Jet Propulsion Laboratory During my 20years at JPL, I have lead many ASIC and FPGA projects for spacecraft and ... - 2012 Dec 08
... Expert in Verilog, reliable FPGA/ASIC design and verification. Principle Engineer 1991 - 12/3/2011 California Institute of Technology - Jet Propulsion Laboratory During my 20years at JPL, I have lead many ASIC and FPGA projects for spacecraft and ... - 2012 Dec 08
Development Technical Support
Los Angeles, CA
... 2011Senior Scientist HD video processing pipeline development: FPGA (Xilinx) Verilog for defect pixel correction, demosaic (Bayer pattern interpolation), black level subtract, color correction, HSL modification, gamma correction, DVI formatting. ... - 2012 Nov 23
... 2011Senior Scientist HD video processing pipeline development: FPGA (Xilinx) Verilog for defect pixel correction, demosaic (Bayer pattern interpolation), black level subtract, color correction, HSL modification, gamma correction, DVI formatting. ... - 2012 Nov 23
Engineer Quality Assurance
Los Angeles, CA
... (Winter, 2005 - 2006) * Radio Frequency Circuit Design (Fall, 2006) * HDL Programming Fundamentals/Design using VHDL and Verilog (Fall, 2007) DirecTv Internal Training classes * Unix/Linux - basics/Inside company training (Fall, 2009) University of ... - 2012 Nov 17
... (Winter, 2005 - 2006) * Radio Frequency Circuit Design (Fall, 2006) * HDL Programming Fundamentals/Design using VHDL and Verilog (Fall, 2007) DirecTv Internal Training classes * Unix/Linux - basics/Inside company training (Fall, 2009) University of ... - 2012 Nov 17
Computer Science Electrical
Los Angeles, CA
... Applied Mathematics (with Specialization in Computer Science) Minor Near Eastern Studies (with Specialization in Persian) PROGRAMMING Java C/C++/C# LANGUAGES Verilog and VHDL Scheme/Lisp Matlab Objective-C/Cocoa Cuda Python RELEVANT Operating ... - 2012 Nov 12
... Applied Mathematics (with Specialization in Computer Science) Minor Near Eastern Studies (with Specialization in Persian) PROGRAMMING Java C/C++/C# LANGUAGES Verilog and VHDL Scheme/Lisp Matlab Objective-C/Cocoa Cuda Python RELEVANT Operating ... - 2012 Nov 12