| Resume alert | Resumes 51 - 60 of 191 |
Skills: bash, verilog, perl, python, tcl, cshell
New Delhi, DL, 110001, India
... - Skills in coding: cshell, bash, perl, python, Verilog, tcl. - Worked on GUI Regression. - Writing scripts to ensure the current state of Testcases . - Creates Testcases based on new functionality in product. - Responsible for the Release of ... - 2016 Sep 19
... - Skills in coding: cshell, bash, perl, python, Verilog, tcl. - Worked on GUI Regression. - Writing scripts to ensure the current state of Testcases . - Creates Testcases based on new functionality in product. - Responsible for the Release of ... - 2016 Sep 19
Electroincs Engineer
New Delhi, DL, 110001, India
... PSIM, PLECS Embedded Software: Keil, MP Lab, Xilinx Programming Languages : Basics of C, 8051 Assembly language, Basics of Verilog Operating Systems: Windows, Open Source Unix (Ubuntu) Projects Prototype Model of Fire Fighting Robotic Soldier ... - 2016 Jun 23
... PSIM, PLECS Embedded Software: Keil, MP Lab, Xilinx Programming Languages : Basics of C, 8051 Assembly language, Basics of Verilog Operating Systems: Windows, Open Source Unix (Ubuntu) Projects Prototype Model of Fire Fighting Robotic Soldier ... - 2016 Jun 23
Basic electronics, CMOS, Digital Design, FPGA, verilog, system verilog
201301, India
... Technical Skills HDLs : Verilog, System Verilog Language : C Subjects : Digital, CMOS, FPGA Operating System : Windows, Linux Tools : ModelSim, Xilinx Key Attributes My Punctuality My disciplined attitude towards my work, quick learner A very ... - 2016 Jun 15
... Technical Skills HDLs : Verilog, System Verilog Language : C Subjects : Digital, CMOS, FPGA Operating System : Windows, Linux Tools : ModelSim, Xilinx Key Attributes My Punctuality My disciplined attitude towards my work, quick learner A very ... - 2016 Jun 15
VLSI Design Engineer
201301, India
... Well versed in VHDL, Verilog and System Verilog. Well verse with DSP, combinational logic and sequential logic circuits. Creating test cases for verification. RTL designing. TECHNICAL SKILLS HDL LANGUAGES : VHDL, Verilog, System Verilog, FPGA and ... - 2016 Jun 04
... Well versed in VHDL, Verilog and System Verilog. Well verse with DSP, combinational logic and sequential logic circuits. Creating test cases for verification. RTL designing. TECHNICAL SKILLS HDL LANGUAGES : VHDL, Verilog, System Verilog, FPGA and ... - 2016 Jun 04
Engineering Project
New Delhi, DL, 110001, India
... COMPUTER KNOWLEDGE: Verilog, VHDL, MATLAB languages. Microprocessor/Microcontroller programming: 8085, 8086, 8051. Programming languages: SAP ABAP, Core Java, C, C++. Operating Systems: WINDOWS 98/2000/XP. PERSONAL DETAILS Date of Birth : 28 Aug ... - 2016 Jun 02
... COMPUTER KNOWLEDGE: Verilog, VHDL, MATLAB languages. Microprocessor/Microcontroller programming: 8085, 8086, 8051. Programming languages: SAP ABAP, Core Java, C, C++. Operating Systems: WINDOWS 98/2000/XP. PERSONAL DETAILS Date of Birth : 28 Aug ... - 2016 Jun 02
VLSI Design Engineer
201301, India
... Ltd., Noida as VLSI Design Engineer • Proficient in Verilog and VHDL modeling, logic synthesis and verification using System Verilog and UVM • Displayed excellence in BFM (Bus Functional Module) of complete AHB architecture and different test cases ... - 2016 May 24
... Ltd., Noida as VLSI Design Engineer • Proficient in Verilog and VHDL modeling, logic synthesis and verification using System Verilog and UVM • Displayed excellence in BFM (Bus Functional Module) of complete AHB architecture and different test cases ... - 2016 May 24
Verilog,Vhdl...
New Delhi, DL, 110001, India
... Technical Skills:- Verilog, VHDL, C, C++, LinuX/Perl, FPGA, Schematic Design Entry, SI and Timing Analysis, SystemVerilog. EDUCATIONALCREDENTIALS:- P.G Deploma (VLSI ) 2015 CDAC, Noida,N/A. M.Tech (VLSI Design) 2014 Galgotias University, Gr.Noida,69 ... - 2016 May 23
... Technical Skills:- Verilog, VHDL, C, C++, LinuX/Perl, FPGA, Schematic Design Entry, SI and Timing Analysis, SystemVerilog. EDUCATIONALCREDENTIALS:- P.G Deploma (VLSI ) 2015 CDAC, Noida,N/A. M.Tech (VLSI Design) 2014 Galgotias University, Gr.Noida,69 ... - 2016 May 23
Engineer Project
201301, India
... Memories, CMOS-Memristor NVSRAMs Digital Electronics Low Power CMOS VLSI Designs SKILLS SUMMARY: Programming Language: C, Verilog IC Development Tools: Cadence Toolkit- Virtuoso, Xilinx ISE (6.1i) Operating System: Windows XP/7 Applications: MS ... - 2016 May 15
... Memories, CMOS-Memristor NVSRAMs Digital Electronics Low Power CMOS VLSI Designs SKILLS SUMMARY: Programming Language: C, Verilog IC Development Tools: Cadence Toolkit- Virtuoso, Xilinx ISE (6.1i) Operating System: Windows XP/7 Applications: MS ... - 2016 May 15
VLSI Intern at Tevatron Technologies Pvt Ltd
New Delhi, DL, 110001, India
... Good understanding of RTL coding using Verilog HDL with all coding styles. Good understanding of layered Test benches using System Verilog and UVM. Exposure in using Industry Standard EDA Tools for the front-end design and Verification. Currently ... - 2016 Apr 04
... Good understanding of RTL coding using Verilog HDL with all coding styles. Good understanding of layered Test benches using System Verilog and UVM. Exposure in using Industry Standard EDA Tools for the front-end design and Verification. Currently ... - 2016 Apr 04
VLSI Engineer
New Delhi, DL, 110001, India
... Technical Skills: O/S Platforms : Windows, Linux Languages : C, C++, Verilog, ‘e’, basics of system verilog Standard/Protocol : Basics of AXI,UFS,SAS and SATA protocol Simulators : Cadence® NCSim, Mentor Graphics® Modelsim, Mentor Graphics® ... - 2016 Mar 21
... Technical Skills: O/S Platforms : Windows, Linux Languages : C, C++, Verilog, ‘e’, basics of system verilog Standard/Protocol : Basics of AXI,UFS,SAS and SATA protocol Simulators : Cadence® NCSim, Mentor Graphics® Modelsim, Mentor Graphics® ... - 2016 Mar 21