ATIBHI JADON

Contact No: +91-917*******

Email ID: acusix@r.postjobfree.com

OBJECTIVE:

Seeking a position to utilize my skills and abilities in the areas of research and development, where I can grow both personally and professionally while being resourceful, innovative and flexible.

EDUCATION:

QUALIFICATION

YEAR

INSTITUTION

UNIVERSITY/BOARD

PERCENTAGE/CGPA

M.Tech

(VLSI Design)

2015

Institute of Technology and Management, Gwalior, (M.P.), India

RGPV, Bhopal, (M.P.), India

8.87 (CGPA)

B.Tech

(Electronics & Communication)

2010

College of Science and Engineering, Jhansi, (U.P.), India

UPTU, Lucknow, (U.P.), India

75.34%

Intermediate

2006

BHEL Shiksha Niketan, Jhansi, (U.P.), India

CBSE

73%

High School

2004

BHEL Shiksha Niketan, Jhansi, (U.P.), India

CBSE

73.80%

PROFESSIONAL EXPERIENCE:

Sr. Service Engineer

Bright Point India Private Limited,

New Delhi, India

23rd May 2011 to 14th August 2012

RESEARCH INTERESTS:

Memory: SRAM, Non-Volatile Memories, CMOS-Memristor NVSRAMs

Digital Electronics

Low Power CMOS VLSI Designs

SKILLS SUMMARY:

Programming Language: C, Verilog

IC Development Tools: Cadence Toolkit- Virtuoso, Xilinx ISE (6.1i)

Operating System: Windows XP/7

Applications: MS-Office

ACADEMIC PROJECTS, SEMINARS & WORKSHOPS:

PROJECTS:

1.Project Title: Hybrid CMOS-Memristive Power Optimization of Static Random Access Memories (M.Tech Dissertation Work)

Tool Used-Cadence Virtuoso Tool (6.1.5 version), Technology- 45nm

The combination of CMOS and Memristor technologies opens the gates for a new hybrid memory circuit that utilizes the unique specifications of Memristor with advantages of CMOS devices to enhance the design of the memory. I have designed different topologies of Non-Volatile SRAM memory cell where Memristor is used as a storage device & helps in the optimization of power. It illustrates many advantageous features related to memory design like linearity, non-volatility, low power and excellent scalability.

2.Project Title: Robotic Arm Implementation using VHDL Programming (B.Tech Project)

Tool Used- Xilinx ISE Webpack Software, VHDL Programming, FPGA/CPLD Kit

This project deals with the handling of objects in automatic manner from one place to another without human interaction. The main feature of this robot is the VHDL (Very High Speed Hardware Descriptive language) programming. The basic aim of this project is to have safe disposal of hazardous nuclear wastes which are produced in the nuclear reactors. Another main component is the FPGA/CPLD kit programmed with the help of Xilinx ISE software, which is the soul of the project. This kit is used for the purpose of programming the automation of robot.

WORKSHOPS:

1.National Workshop on EMBEDDED SYSTEM DESIGN USING MICRO-CONTROLLER (2nd- 4th November, 2012).

2.National Workshop on INTELLECTUAL PROPERTY RIGHTS, sponsored by MPCST, Bhopal & ITM Gwalior (14th February 2014).

TRAININGS:

1.Training at BHARAT HEAVY ELECTRICALS LIMITED, JHANSI on “Computer Networking Through Optical Fibre Communication”.

2.Industrial visit at U.P. RAJYA VIDUT UTPADAN NIGAM LIMITED, PARICHHA (JHANSI) under Thermal Control and Instrumentation Division III.

ACHIEVEMENTS:

Awarded with Gold Medals two times to stood First in M.Tech (VLSI Design) Course.

Student member of Institute of Research Engineers and Doctors (IRED).

Certificate of Appreciation for Engineering Quizzes, 100% Attendance, Merit in Biology, Model Presentation, Painting, etc.

Awarded first in teaching performance organized by school.

Participated and won prizes in various competitions organized by District Science Club, Jhansi (U.P.).

LIST OF PUBLICATIONS:

Published:

1.Atibhi Jadon and Shyam Akashe, “Hybrid CMOS-Memristor 4T-NVSRAM Cell for Low Power Applications”, International Conference on Innovative Applications of Computational Intelligence on Power, Energy and Controls with their effect on Humanity (CIPECH-2014), Ghaziabad, Uttar Pradesh, India, pp.369-373, 28th-29th November, 2014. (IEEE Copyright)

2.Atibhi Jadon and Shyam Akashe, “Memristive Power Optimization of Non-Volatile Seven Transistors Static Random Access Memory Cell”, International Conference on Opto-Electronics and Applied Optics (IEM OPTRONIX-2014), Kolkata, India, pp.245-253, 17th-18th December, 2014. (Springer Copyright)

Patent:

1.Atibhi Jadon and Shyam Akashe, “One Fin One Memristor (1F1M): Fast Accessing Non-volatile, High Performance-High Density, Optimized Array”, Ref. No./ Application No. 3125/MUM/2015, Filed in August 2015, India.

PERSONAL DETAILS:

Gender

Female

Date of Birth

28th August 1988

Marital Status

Single

Category

General

Nationality

Indian

Language known

English (S/R/W) & Hindi (S/R/W)

Hobbies

Quilling Creative Art, Collecting Coins, Reading books

Permanent Address

SRS-149, Subhash Nagar, BHEL, Jhansi, (U.P.) - 284120

DECLARATION:

I hereby declare that the above mentioned information’s are true to the best of my knowledge.

Atibhi Jadon

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