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Skills: bash, verilog, perl, python, tcl, cshell

Location:
New Delhi, DL, 110001, India
Posted:
September 19, 2016

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Resume:

GARIMA SINGH

email- acwoj1@r.postjobfree.com

Ph. +919*********

New Delhi

I would like to associate myself with a progressive and team oriented organization, which provides me opportunities to move forward and expand my knowledge along with the organization . PROFILE SUMMARY

● M.Tech. professional with 2 years of experience in:

~ Software & Product Testing

~ Defect Management

~ Troubleshooting in scripts.

● Currently associated with Interra Systems, Noida as an Application Engineer.

● Experienced in troubleshooting technical defects and providing technical support.

● Keen planner with skills in coding and testing.

WORK EXPERIENCE

Technical Responsibilities:

- Enhancing Existing product by testing its features and functionality.

- Skills in coding: cshell, bash, perl, python, Verilog, tcl.

- Worked on GUI Regression.

- Writing scripts to ensure the current state of Testcases .

- Creates Testcases based on new functionality in product.

- Responsible for the Release of product to customers. Key Projects

MC2 (Role: Testing Engineer)

TouchStone (Role: Testing Engineer)

Software Skills: Tcl, Bash, Cshell, Perl, Python, Verilog. Tools Known: Cadence Virtuoso, Simvision, MC2, Modelsim, Mentor Graphics IC Station. PUBLICATION (Jan2014 - June.2014)

Design of Low Area and Low Power - Modified 32-bit Square Root Carry Select Adder Tools Used : Mentor Graphic MODELSIM, XILINX ISE

Coding : Verilog

Details : Major project in M.Tech, CDAC NOIDA.

Carry select adder is useful in various units like ALU, multipliers etc.

Modified Carry select adder is with reduced AREA and POWER.

This uses the Binary to Excess-1 converter (BEC) technique.

Code has been simulated and checked on ModelSim. Published research paper in International Journal of Engineering Research and General Science Volume 2, Issue 4, June-July, 2014, ISSN 2091-2730.

KEY ACADEMIC PROJECTS

M. Tech. Thesis (Jan 2014 – June 2014)

Design of Low Area and Low Power - Modified 32-bit Square Root Carry Select Adder Tools Used : Mentor Graphic MODELSIM, XILINX ISE

Coding : Verilog

Details : Major project in M.Tech, CDAC NOIDA.

Carry select adder is useful in various units like ALU, multipliers etc.

Modified Carry select adder is with reduced AREA and POWER.

This uses the Binary to Excess-1 converter (BEC) technique.

Code has been simulated and checked on ModelSim. Graduation Project (Bachelor of Technology) (Jan2011 – June 2011) Auto Security with Dial-Up Logic

Tools used : 8051 Microcontroller kit

Language : Assembly

Details : Logic detects the fire.

Detects Gas.

Detects password on the main gate.

On detection a call is set by the microcontroller through APR 9600 to the owner’s pre -Setted number. EDUCATIONAL QUALIFICATIONS

Year Degree Institution Percentage

2014 M. Tech. (VLSI Design) C-DAC Noida (GGSIPU) 78.93% 2011

B.Tech. (Electronics &

Telecomm.)

MGM COET, Noida 70.9%

2007 XII (CBSE) DAV Public School, Brij Vihar 71.6% 2005 X (CBSE) DAV Public School, Brij Vihar 78.4%



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