| Distance: | Resume alert | Resumes 111 - 120 of 727 |
Power System
Vasant Nagar, Karnataka, India
... • WINDOWS • UNIX TOOLS • MS WORD • MS EXCEL • MS POWERPOINT • CADENCE • LABVIEW • MI-POWER PROGRAMMING LANGUAGES • SYSTEM VERILOG • VERILOG • VHDL • HTML MAHESH KRISHNA K WORKSHOPS - Attended 3 days training program on "Automation Technologies" ... - 2020 Feb 06
... • WINDOWS • UNIX TOOLS • MS WORD • MS EXCEL • MS POWERPOINT • CADENCE • LABVIEW • MI-POWER PROGRAMMING LANGUAGES • SYSTEM VERILOG • VERILOG • VHDL • HTML MAHESH KRISHNA K WORKSHOPS - Attended 3 days training program on "Automation Technologies" ... - 2020 Feb 06
Inplant Training Engineering
Vasant Nagar, Karnataka, India
... Erode, Tamil Nadu Percentage: 94.00 AREA OF INTEREST Digital Design & Power Electronics COMPUTER COMPETENCE Language : Verilog, Shell Scripting Tools Proficiency : Xilinx ISE Design, Mentor Graphics ModelSim, MATLAB Simulink ACADEMIC ACHIEVEMENTS ... - 2020 Feb 05
... Erode, Tamil Nadu Percentage: 94.00 AREA OF INTEREST Digital Design & Power Electronics COMPUTER COMPETENCE Language : Verilog, Shell Scripting Tools Proficiency : Xilinx ISE Design, Mentor Graphics ModelSim, MATLAB Simulink ACADEMIC ACHIEVEMENTS ... - 2020 Feb 05
Design Engineer
Vasant Nagar, Karnataka, India
... + Programming Skills: Verilog,System verilog,C,CPP,perl & Basic Idea of Python + Personal Skills: Quick learner, Good problem solving skill, Leadership,Co-operative and Adaptive nature, Determined to learn with practical approach Internship(RTL ... - 2020 Feb 05
... + Programming Skills: Verilog,System verilog,C,CPP,perl & Basic Idea of Python + Personal Skills: Quick learner, Good problem solving skill, Leadership,Co-operative and Adaptive nature, Determined to learn with practical approach Internship(RTL ... - 2020 Feb 05
Design Project
Bangalore, Karnataka, India
... Tech ECE Vignan’s University 2019 83.25% Intermediate M.P.C BOI 2015 94.6% S.S.C SSC 2013 9.7 HDL : Verilog HVL : System Verilog Verification Methodology: UVM, Coverage Driven Verification, Assertion Based Verification • Protocols : TCP/IP EDA Tools ... - 2020 Jan 08
... Tech ECE Vignan’s University 2019 83.25% Intermediate M.P.C BOI 2015 94.6% S.S.C SSC 2013 9.7 HDL : Verilog HVL : System Verilog Verification Methodology: UVM, Coverage Driven Verification, Assertion Based Verification • Protocols : TCP/IP EDA Tools ... - 2020 Jan 08
Electronics and Communication Engineering
Bangalore, Karnataka, India
... TECHNICAL SKILLS ELECTRONICS DESIGN TOOLS : MATLAB, VERILOG, CADENCE SCRIPTING LANGUAGES : JavaScript DATABASE : SQL O.S. : Windows Family (XP, 7,8,10), Red Hat Linux, Ubuntu PROGRAMING LANGUAGES : C, C++, JAVA NON-TECHNICAL SKILLS Good ... - 2019 Dec 09
... TECHNICAL SKILLS ELECTRONICS DESIGN TOOLS : MATLAB, VERILOG, CADENCE SCRIPTING LANGUAGES : JavaScript DATABASE : SQL O.S. : Windows Family (XP, 7,8,10), Red Hat Linux, Ubuntu PROGRAMING LANGUAGES : C, C++, JAVA NON-TECHNICAL SKILLS Good ... - 2019 Dec 09
C,C++,Verilog
Bangalore, Karnataka, India
... PROGRAMMING LANGUAGE AND UTILITIES Verilog Xilinx 14.7 C and C++ Turbo C Pcb designing Protel Advance 2.7.1 SKILLS Knowledge of Cmos fundamentals,fabrication Vlsi basics Digital and analog electronics Memories communication basics Static timing ... - 2019 Nov 24
... PROGRAMMING LANGUAGE AND UTILITIES Verilog Xilinx 14.7 C and C++ Turbo C Pcb designing Protel Advance 2.7.1 SKILLS Knowledge of Cmos fundamentals,fabrication Vlsi basics Digital and analog electronics Memories communication basics Static timing ... - 2019 Nov 24
Engineering Project
Vasant Nagar, Karnataka, India
... tools & language: Quartus 13.0sp1, Xilinx 14.7,Keil uVison, C language, Assembly language, Verilog language Embedded Systems: Microcontroller 8051 INTERNSHIP Internship in Synthesis winding technologies Pvt.ltd on Standardized terminal blocks. ... - 2019 Nov 13
... tools & language: Quartus 13.0sp1, Xilinx 14.7,Keil uVison, C language, Assembly language, Verilog language Embedded Systems: Microcontroller 8051 INTERNSHIP Internship in Synthesis winding technologies Pvt.ltd on Standardized terminal blocks. ... - 2019 Nov 13
Verification Engineer
Bangalore, Karnataka, India
... ㅡ Skills ㅡ Experience Languages : System Verilog, Verilog, SystemC, C, C++ Scripting Languages : Python, Perl Methodologies : UVM, OVM, TLM Tools : DVE, VCS, Virtualizer (VPA/PCT), Simics, CoMET, GTK Wave IDE/Debuggers : Visual Studio, Eclipse, ... - 2019 Nov 11
... ㅡ Skills ㅡ Experience Languages : System Verilog, Verilog, SystemC, C, C++ Scripting Languages : Python, Perl Methodologies : UVM, OVM, TLM Tools : DVE, VCS, Virtualizer (VPA/PCT), Simics, CoMET, GTK Wave IDE/Debuggers : Visual Studio, Eclipse, ... - 2019 Nov 11
Wireless communications, digital signal processing, LTE, 4g, 5g
Bangalore, Karnataka, India
... (Submitted) SKILL SET Microsoft Office Word, Microsoft Office Excel, Microsoft Office Power Point, Latex Language: MATLAB, C++, C, PYTHON,VERILOG CO-/EXTRA –CURRICULAR ACTIVITIES Passionate in Bodybuilding, Basketball. Plays Piano and Guitar at ... - 2019 Nov 06
... (Submitted) SKILL SET Microsoft Office Word, Microsoft Office Excel, Microsoft Office Power Point, Latex Language: MATLAB, C++, C, PYTHON,VERILOG CO-/EXTRA –CURRICULAR ACTIVITIES Passionate in Bodybuilding, Basketball. Plays Piano and Guitar at ... - 2019 Nov 06
Engineer Engineering
Vasant Nagar, Karnataka, India
... Email ID :**********@*****.*** Mobile: +91-991*******/866******* LinkedInID:https://www.linkedin.com/in /pramod-m-v-923194194/ TECHNICAL SKILLS Machine Learning Deep Learning Embedded PROGRAMMING SKILLS Python Numpy Pandas Embedded C System Verilog ... - 2019 Oct 25
... Email ID :**********@*****.*** Mobile: +91-991*******/866******* LinkedInID:https://www.linkedin.com/in /pramod-m-v-923194194/ TECHNICAL SKILLS Machine Learning Deep Learning Embedded PROGRAMMING SKILLS Python Numpy Pandas Embedded C System Verilog ... - 2019 Oct 25