Engineering Project

POOJA NAYAK.N

EMAIL ID: **************@*****.***

MOBILE: 789-***-****

CAREER OBJECTIVE

Looking for an opportunity to work with an organization that will provide a culture of freedom and also platform to effectively utilize my technical skills in the field of engineering for the development of myself and for the company in which I am with utmost dedication. ACADEMIC QUALIFICATIONS

M-TECH Visvesvaraya Technological University (2017-2019) VLSI and Embedded System, secured 8.0 CGPA

Bangalore Institute of Technology, Bangalore

B.E Visvesvaraya Technological University (2013-2017) Electrical and Electronics Engineering, secured 69.8% RajaRajeswari College of Engineering, Bangalore

PUC Karnataka State Board (2011-2013)

Jnanodaya PU College, Bangalore, secured 58.8%

SSLC Karnataka State Board (2010-2011)

St.Teresa’s Girls High School, Bangalore, secured 84.8% TECHNICAL SKILLS

Simulation software: MATLAB, PSPICE, Xilinx, Quartus Application Packages: MS office

Design Tools: AutoCAD 2007(2D Modeling),Cadence

Development tools & language: Quartus 13.0sp1, Xilinx 14.7,Keil uVison, C language, Assembly language, Verilog language

Embedded Systems: Microcontroller 8051

INTERNSHIP

Internship in Synthesis winding technologies Pvt.ltd on Standardized terminal blocks. It enabled me to know about different types of connectors and their uses. Internship in Tenet Technetronics on “Quartus FPGA board”. It enabled me to learn about programmable logic devices such as FPGA’s and their architecture and also to use Xilinx and Quartus software to code and simulate using Verilog language. ACADEMIC PROJECT DETAILS

MPPT based improvement of solar power efficiency using lab view: The project aims at reducing the cost and increase the efficiency using solar energy effectively. Implementation of secure encrypted data layer for IOT applications on a reconfigurable hardware: The project is implemented on FPGA board to increase the efficiency and enables the confidentiality for Communication through an insecure channel. Optimizing the convolution operation for image processing using Efficient MAC unit: The project proposed loop optimization method and exploited logic elements to implement efficient MAC unit on FPGA.

EXTRA CURRICULAR ACTIVITIES

Participated in Skill development Program on Transmission & Distribution Line Maintenance organized by National Power Training Institute. Worked as a Coordinator in National Level symposium in our college. Presented Project Papers in National conference and UGC approved Journals. HOBBIES

Drawing

Listening music

PERSONAL DETAILS

Date of Birth: 22/01/1995

Father’s Name: Nataraju

Language Known: Kannada, English, Hindi

Address: #192,1st main road, B/W 5th and 6th cross, Chamarajpet, Bangalore-560018. DECLERATION

Here by I declared that above mentioned information’s are true as per my knowledge. Thanking you

Yours sincerely

Pooja Nayak.N

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