Email ID: firstname.lastname@example.org
To pursue a challenging career and to be a part of an organization that gives a scope to enhance my knowledge and utilize my skills for the growth of organization.
Advanced VLSI Design and Verification Course in Maven silicon, VLSI Design and Training Center, Bangalore
Year of pass
HDL : Verilog
HVL : System Verilog
Verification Methodology: UVM, Coverage Driven Verification, Assertion Based Verification • Protocols : TCP/IP
EDA Tools : QuestaSim-Mentor Graphics, ISE-Xilinx
Domain : FPGA front-end Design and Verification
Knowledge : RTL Coding, FSM based design, Simulation, Code Coverage, Functional Coverage, Synthesis, ABV-SVA
C Language, Java
CURRICULUM PROJECT :
Router 1x3 – RTL design and Verification
TB Methodology: UVM
EDA Tools: Questasim and ISE
Description: The router accepts data packets on a single 8-bit port and routes them to one of the three output channels, channel0, channel1 and channel2.
Architected the block level structure for the design Implemented RTL using Verilog HDL.
Architected the class based verification environment using SystemVerilog Verified the RTL model using SystemVerilog.
Generated functional and code coverage for the RTL verification sign-off Synthesized the design.
TITLE: DTMF Controlled Robot
ROLE: Team Leader DESCRIPTION:
This project is very useful for military purpose. In our project we learned the technology of dual tone multi frequency in which we used a basic mobile for operating the robot with a long distance. By using this technology robot is operated with high speed and it is used for long distance communication.
Secured winning certificate in “Technical Paper Presentation” from Vignan's Nirula college.
Secured BEC certification from Cambridge University.
Secured winning certificate in throw ball from KL University.
EXTRA CURRICULAR ACTIVITIES :
Coordinated for Srujanankura during 2016-17 in Vignan’s University.
Coordinated for project-expo during Vignan Mahotsav 2018.
BEHAVIOURAL SKILLS :
Dedication towards work.
Participated in “PCB Workshop” conducted at Vignan’s University.
Participated in “IOT Workshop” conducted at Vignan’s University.
I hereby, declare that above mentioned information is true to the best of my knowledge.
Place: Bangalore (Rayala SriKavya)
ACADEMIC PROFILE :