| Distance: | Job alert | Jobs 91 - 100 of 1060 |
R&D Engineering Manager
ZipRecruiter
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Southampton, NY, 11969
... Your Responsibilities: Lead and mentor a team of skilled FPGA engineers Provide technical direction for FPGA design, verification and validation Oversee the complete development lifecycle from requirements to hardware integration VHDL/Verilog code ... - Jul 08
Emulation Verification Engineer
Apple
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Beaverton, OR
... code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraints Minimum of BS + 3 years relevant industry experience. ... - Jul 19
DV Engineer
Mastech Digital
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San Jose, CA
80USD - 100USD per hour
... - Knowledge in UVM, System Verilog/Verilog. - Prefer background in domains like CPU, GPU or other similar ASIC experiences. - Expect the ability to code. Education: Bachelor’s degree in computer science, Electrical/Electronic Engineering, ... - Jul 20
Eng Sr Prin - Elec
BAE Systems
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Westminster, CO, 80021
... Expertise in VHDL/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. Ability to work requirements and flow down for system/subsystem/box/board needs. Good communication skills ... - Jul 10
Digital IC Design Engineer
Apple
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Sunnyvale, CA
$126,800-$190,900/year
... Logic design experience using System Verilog including high speed and deep sub-micron design. Familiarity with design tools for RTL simulation, debugging, synthesis and timing analysis. Familiarity with power management/techniques for low power ... - Jul 06
Eng Sr Prin - Elec
BAE Systems
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Westminster, CO, 80021
... Expertise in VHDL/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. Ability to work requirements and flow down for system/subsystem/box/board needs. Good communication skills ... - Jul 11
RTL Design and Verification
BCforward
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West Lake Hills, TX
... Effective behavioral modeling and testing of circuits in Verilog and System Verilog, as well as logical equivalence verification between Schematic and Verilog models. UPF (Unified Power Format) creation using low power techniques and handling ... - Jul 14
Principal Engineer, AMS Verification
Infinera
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Yujing District, Tainan, 714, Taiwan
... • Hands-on in modeling and simulating with System-Verilog (WREAL), Verilog-AMS, and/or C, C++. • Have a decent understanding in CMOS analog / mixed signal design. Preferred Knowledge/Skill/Abilities: • Able to create IBIS-AMI model. • Can code in ... - Jul 16
Media Processing Accelerator Architect, Platform Architecture
Apple
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San Diego, CA
$201,300-$367,400/year
... team to define, architect and implement application specific accelerators BS degree Coding skills including C++, Python and/or Verilog Computer architecture knowledge Design automation knowledge MS or PhD degree 20+ years of relevant experience ... - Jul 06
ASIC & FPGA Design Engineering with Security Clearance
PlanIT Group LLC
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Orlando, FL, 32801
... years of experience with an MS •6+ years of experience HDL programming experience with VHDL, Verilog, and/or System Verilog •6+ years of experience in Hardware-Software Integration and Validation •6+ years of experience with FPGA toolsets Permanent - Jul 17