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Verification Engineer

Damco Solutions Inc  –  Chicago, IL
Verification Engineer Location: Chicago, IL - Onsite Duration: 6 to 8 months " Must have very good System Verilog/UVM experience in developing test benches " Must have experience with developing test benches with RISC-V based SoC " RISC-V processor ... - Oct 23

DDR Design Engineer

Apple Inc.  –  Cupertino, CA, 95014
... Supporting silicon bring-up, performance and power characterization.RTL design using Verilog or SystemVerilog, assertion writing Design of state machines, data paths, arbitration and clock domain crossing logic Logic synthesis, and timing ... - Oct 27

Research Scientist Intern, Machine Learning Acceleration (PhD)

Meta Platforms, Inc.  –  Sunnyvale, CA, 94085
... optimizations like Neural Architecture Search, quantization, pruning, or similar Experience or familiarity with C/C++, Verilog, System Verilog, or VHDL Familiarity with high performance software kernel development for customized ISA Familiarity ... - Oct 30

FPGA Verification Specialist

Auctis  –  New York state
... Collaborate within a dynamic team, creating test specifications, writing tests in System Verilog, and ensuring designs meet requirements. Be part of cross-functional teams to verify FPGA designs for radio product development projects. Essential ... - Oct 24

High Speed Analog/Mixed-Signal IC Design Engineer

Apple Inc.  –  San Diego, CA, 92140
... Simulation and Modeling: Skilled in designing/debugging RTL, developing System Verilog models, and performing behavioral simulations to explore new architectural performance and functions. Attention to Detail: Exceptional focus on understanding the ... - Oct 27

GPU Logic Design Engineer

Intel Corp.  –  Phoenix, AZ, 85002
... implementation challenges with a focus on schedule * Strong verbal and written communication skills Good understanding of verilog and system verilog, synthesizable RTL * Knowledgeable in modern design techniques and energy-efficient/low power logic ... - Oct 26

Micro-Architect / RTL Design - CPU, Principal

d-Matrix  –  Santa Clara, CA, 95053
... Computer Engineering or Computer Science with 5 years of meaningful work experience • Experience in micro-architecture and RTL development (Verilog/System Verilog), focused on Processor and sub-system design, Digital Signal Processing blocks. ... - Oct 23

Mixed-Signal Verification Engineer

Apple  –  San Francisco, CA
... Expertise building Mixed-Signal testbenches, checkers and tests using System Verilog. Experience in UVM methodology and HDL (System Verilog, Verilog) for verification. Strong verification skills in problem solving, constrained random testing, and ... - Oct 26

Senior Silicon Design Engineer

Intel Corp.  –  Austin, TX, 78719
... * Experience with System Verilog/SOC development environment. * Experience in scripting languages (i.e. PERL, TCL, or Python). * Experience with Hardware validation techniques (i.e. formal Verification, Test and Function Verification). Preferred ... - Oct 18

Mixed-Signal Verification Engineer

Apple  –  San Diego, CA
... Expertise building Mixed-Signal testbenches, checkers and tests using System Verilog. Experience in UVM methodology and HDL (System Verilog, Verilog) for verification. Strong verification skills in problem solving, constrained random testing, and ... - Oct 26
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