| Distance: | Job alert | Jobs 61 - 70 of 2333 |
SOC Verification Engineer
Apple Inc.
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California
... Experience with System Verilog Assertion (SVA). Experience with IP verification method and integration verification. Knowledge with IPs developments and release flow. Programing experience in C. Experience writing scripts in languages such as Perl ... - Oct 30
Senior ASIC/VLSI Synthesis and Design Engineer
Celestial AI
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Irvine, CA
... Expertise in Verilog/SystemVerilog RTL coding and constraint development for synthesis. Proficiency in synthesis tools from leading EDA vendors (Cadence, Synopsys, Mentor). Experience with gate-level simulation, static timing analysis (STA), and ... - Oct 31
CPU Processor Power Management
Apple
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Cupertino, CA
... test plans and schedules for the power management and clock control logic - Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments - Root cause failures and ... - Oct 30
Dir Analog Engineering
Rambus
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Morrisville, NC, 27560
... with 10+ years of analog / mixed-signal circuit design experience * Experience managing,mentoring, guiding engineering teams * Direct chip design experience in DDR product is a strong plus * Experience with Verilog coding is a strong plus * ... - Oct 06
Senior Staff GPU Validation and Emulation Engineer
Qualcomm
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Santa Clara, CA, 95051
... Job Description: * Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms * Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis ... - Oct 29
Embedded Design Engineer
Extropic
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Boston, MA, 02298
... including documentation and specs Useful but not necessary skills include Programming in VHDL and/or Verilog Handling and debugging complex integrated systems Probing and testing integrated circuits $90,000 - $200,000 a year Pay includes equity. ... - Oct 30
CPU Processor Power Management Verification Engineer
Apple
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Santa Clara, CA
... test plans and schedules for the power management and clock control logic • Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments • Root cause failures and ... - Oct 29
CPU Processor Power Management Verification Engineer
Apple
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Santa Clara, CA
... test plans and schedules for the power management and clock control logic • Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments • Root cause failures and ... - Oct 29
Senior Design Verification Engineer
Griffin Global Systems, Inc.
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San Jose, CA
... planning, coverage closure, testbench, and testcases development for function/performance verification Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding ... - Oct 22
Senior ASIC Design Verification Engineer
Persimmons
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San Jose, CA, 95131
... Technical Mastery: Advanced skills in SystemVerilog/Verilog, UVM methodology, and C/C++ programming, including embedded code development and validation for RISC-based processors. Verification Leadership: Established track record in creating scalable ... - Oct 26