| Distance: | Job alert | Jobs 111 - 120 of 2281 |
Mixed-Signal Verification Engineer
Apple
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San Diego, CA
... Expertise building Mixed-Signal testbenches, checkers and tests using System Verilog. Experience in UVM methodology and HDL (System Verilog, Verilog) for verification. Strong verification skills in problem solving, constrained random testing, and ... - Oct 25
Senior FPGA Engineer
Muon Space
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San Jose, CA, 95111
... in Computer Science, Electrical Engineering, or a related field * 5+ years of FPGA or ASIC design experience with strong Verilog or SystemVerilog expertise in logic design, simulation, and verification * Deep understanding of synchronous and ... - Oct 23
Mixed-Signal IC Design Engineer
Apple Inc.
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Beaverton, OR, 97075
... parametric yield loss Experience in C / MATLAB / Verilog modeling Proficiency in Python programming Experience with AI/ML, especially in applying tools and technique to any/all aspects of analog/mixed-signal circuit design and productizationArray - Oct 22
Lead Architecture & Performance Modeling Engineer
Eridu AI
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Saratoga, CA, 95071
... Strong background in FPGA/ASIC design flows, including synthesis, simulation, and verification tools (e.g., Verilog, VHDL, Synopsys, Cadence). Demonstrated ability to drive architectural discussions and influence design trade-offs through modeling ... - Oct 24
Staff RTL Engineer, Ingress/Egress
Eridu AI
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Saratoga, CA, 95071
... Solid understanding of FPGA or ASIC design methodologies, including synthesis, simulation, and verification tools (e.g., Verilog, VHDL, Synopsys, Cadence). Experience with Ethernet networking protocols (e.g., IEEE 802.1Q, 802.1p, 802.1ad). Knowledge ... - Oct 24
GPU Design Engineer - Memory Hierarchy
Apple Inc.
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Santa Clara, CA, 95051
... designs Proficiency in Verilog/System Verilog and HDL Hands-on experience with RTL or architectural modeling Able to work in an environment of uncertainty and navigate through ambiguities Strong communication, influence, and negotiation skillsArray - Oct 12
FPGA RTL Design Engineer
Intellisoft Technologies
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Santa Clara, CA, 95053
... Key Responsibilities: Develop and implement FPGA RTL designs using Verilog/VHDL/SystemVerilog. Target and optimize designs for Intel/Altera Quartus FPGA platforms . Perform IP integration, verification, and debug at block and system level. Conduct ... - Nov 02
RTL Design Engineer
Apple
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Waltham, MA
... Deep knowledge of Verilog and SystemVerilog. Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers, reset domain crossing, unified power flow, logic equivalence checkers). Working knowledge of synthesis, ... - Oct 26
Standard Cell Design Methodology Flow Engineer
Apple Inc.
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Santa Clara, CA, 95051
... * Collaborate with technology team on new process requirements and work with design/CAD team to enable relevant tools/flows * Implement sophisticated digital block in Verilog/SystemVerilog, run simulations or formal check for verification. * Use ... - Oct 12
PMU Design Verification Engineer: Analog & Mixed Signal Engineer
Apple
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Austin, TX, 78703
... + Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code. + Familiarity with authoring analog assertion checks to catch bugs. + Capability to identify failure mechanisms and review verification results in ... - Oct 27