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Resumes 11 - 20 of 391 |
Sunnyvale, CA
... Star-RC, VCS, Encounter, ICV, IC- Workbench, Calibre, Custom-Compiler, MATLAB VLSI architectures and design methodologies, FPGA Firmware, embedded programming, field system engineering Microprocessors, embedded memories, controls, interconnect, DDR, ...
- Mar 10
San Jose, CA
... Solaris, Soleil, Helios, MynaPS, Zao, Whistle+, Titanian, Fabrico, Vail on different platforms: EVB, FPGA, Palladium (Candence simulation) Senior firmware engineer (Ario Data Networks Inc.) 02/2006-07/2006 NAS-based Raid System firmware developer. ...
- Feb 29
San Jose, CA
... ● Programming languages: C++, Java, Javascript, HTML/CSS, SQL, hardware description languages- Verilog, VHDL, FPGA. Volunteer and Additional Experiences ● Certified Scrum Master (CSM) ● Machine learning and business strategy certification 2024 ● ...
- Feb 28
Santa Clara, CA, 95050
... Familiar with verification plan and coverage metrics Familiar with OOP constructs and constraint random verification 10+ years of experience with FPGA design and implementation, including verification, synthesis and P&R, STA, timing analysis and ...
- Feb 06
San Jose, CA
... 5G Prototype: Generated input vectors, performed tests for Tx and FPGA interaction, and signal processing on Rx side for 1x1, 1x2, 2x1 and 2x2 MIMO. Skills required: C/C++, MATLAB, Verilog, and Perl. Mmwave MIMO: Performed tests for 1 user 1 stream, ...
- Jan 16
San Jose, CA, 95126
... EXPERIENCE May 23 – Aug 23 Assistant System Engineering Trainee – Banking & Financial Solutions, TATA Consultancy Services, Bangalore ACADEMIC PROJECTS TITLE: IMAGE PROCESSING ON ZYNQ (FPGA) Objective was to input the image via Ethernet from a ...
- Jan 10
Fremont, CA
... RF, Clock signals, controlled impedance, SMT, FPGA and thru-hole technology. Worked for electronic and mechanical packaging for numerous projects over the past nine years including the Orbital Maneuvering Vehicle (OMV) (space-based robot), Gamma-Ray ...
- Jan 09
Milpitas, CA
... This involves FPGA Loading, CPLD Writing, and Flash writing through Cascon Galaxy, EEPROM writing through Test Stand. ● Developed Driver for DC Electronic Load. This involves programming of the GPIB interface using C. ● Development of Fixture driver ...
- Jan 09
San Jose, CA
... • Pre-silicon debugging using JTAG on FPGA • Implemented IOMMU drivers • Various kernel bug fixes and improvements in kernel memory management area Various Personal/Home Projects Network Gadget/Utility Enthusiast/Hobbyist 1990 - October 2012 (22 ...
- 2023 Nov 02
San Jose, CA, 95118
... Transferred RTL from ASIC to FPGA for emulation. Verified data link layer for PCI-E. Used VIPs from Cadence, Synopsys Resolved LP related Multi-mode, Multi-corner MMMC, STA timing corners and PVT issues. Transformed verification components from OVM ...
- 2023 Oct 31