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Engineer Engineering

San Diego, California, United States
December 31, 2017

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Seeking a career with an organization offering stability, professionalism and the ability to learn and grow. A position in Electrical Engineering involving embedded hardware, software, and/or digital design where I may utilize my digital design and software experience.


Digital Circuit Design

Designed and successfully tested DRAM image frame readout controller using VHDL and Altera FPGA for Stinger Missile digital video applications.

Designed and successfully tested Altera FPGA implementation of RISC microprocessor using VHDL

Designed and successfully tested memory buffer FPGA for Stinger Missile digital video imaging applications using Altera’s MAXPLUS II.

Developed VHDL for Xilinx FPGA for fault tolerant satellite applications.

Designed CMOS ASIC using Cadence tools with Verilog for high speed SONET/ATM applications.

Designed and debugged Intel 8051 and X86 board level systems for prototype evaluation.


Wrote data acquisition software in C to drive interface between EPROM on external board and PC.

Wrote DSP software in C and MATLAB as part of MPEG digital signal processing project.

Have hardware/software development lab at home to keep skills sharp with ORCAD, MATLAB, Verilog, VHDL, Xilinx ISE, Vivado, Altera Quartus, ModelSim, PCB Artist, MAXPLUS II, 8051 development system, C/C++ compiler and assembler, Spice, logic analyzer and oscilloscopes,

Analog and Mixed Signal Circuit Design

Designed timing and control circuits for mixed-signal CMOS chip used for imaging system.

Designed A/D Converter with Intel 286 processor and 8 bit LED display



Science, Technology, Engineering, and Mathematics Tutor 02/14 – Present

Provided tutoring services both at the high school and college levels for calculus,

algebra, analytic geometry, introductory physics, electrical engineering, digital design, and C


Advanced Earth Technologies, San Diego, CA 02/09 – 12/13

Engineering Consultant

Supported microcontroller software for a robot used for military applications (part time, paid with company stock, company went out of business)

Collabera, San Diego, CA 07/12– 09/12

Engineering Consultant

Modified software written in C for Top Level Mode Multiplexer(product behind schedule, and insufficient training for contractors).

Hindustan Computers Limited, Irvine, CA 03/12 – 06/12

Digital Test Engineer,

Used oscilloscope and logic analyzer to verify correct performance of digital circuit boards, including

clock frequency, duty cycle, propagation delay between components, and verifying test patterns by

writing to and reading from test registers on the board (difficulties coordinating with engineers in India).

Netlist, Irvine, CA (layoff due to economic downturn) 06/08 – 02/09

Digital Design Engineer,

Used Spice simulations to modify I/O buffer designs and perform impedance matching to minimize ringing on printed circuit board traces. Wrote test plan for DRAM controller and simulated digital designs with ModelSim and Verilog to decrease power consumption of DRAM chips.

Hewlett Packard, Rancho Bernardo (Successfully completed project) 12/06 - 06/07

Worst Case Analysis Engineering Consultant,

Performed worst case analysis for printed circuit board designs used in HP printers, saving HP money by not shipping defective boards.

Space Micro, San Diego, CA (Project slated for 2 months) 02/06 - 04/06

Engineering Consultant

Developed VHDL design of Xilinx FPGA for fault tolerant enhancement of data encryption/decryption module for satellite applications.

University of California at Irvine Engineering Extended Education 1999 – 2007

Evening Instructor, Taught class on FPGA architecture (Altera and Xilinx), using Altera Quartus and Xilinx ISE, VHDL, Verilog, ModelSim, market issues, JTAG Boundary Scan, and noise issues.

Cal. State Fullerton Extended Education Microprocessor Design Program 1994 – 1998

Evening Instructor, Taught classes in Digital Logic Design, Microprocessor Architecture

(Intel based), number representation systems, floating point numbers, digital implementations

of multiplication, addition, and subtraction.

Technical Consultant 2002 – 2005, 2007 -2008, 2012 - 2015

Did several bids, however the funding never came through and projects were dropped Biomedical Devices, Vista, CA(Medical device based on the Intel 8051), Viasys Health Care, Yorba Linda, CA (Design of digital board using Xilinx FPGA, DDRAM and Coldfire processor), Aethercomm

Carlsbad, CA (digital controller for microwave board), Delphi Engineering Group Costa Mesa, CA

(FPGA design for DSP applications)

Ipitek, Carlsbad, CA (layoff due to dot com collapse) 06/00 - 04/01

Staff Engineer

Finalized and debugged design of Xilinx FPGA used for cable TV applications using ABEL, enabling the company to ship the board. Evaluated JTAG Boundary Scan scheme for testing Xilinx FPGA. Troubleshot digital board for noise problems using capacitive loading, noise margin, and current analysis techniques.

Cadence Telecommunications Design Group, Santa Barbara, CA 02/00 - 04/00

Engineering Design Consultant (breach of contract by client of Cadence)

Designed telecommunications logic for CMOS ASIC using Cadence tools with Verilog test bench for high speed SONET/ATM applications.

Bristol Systems (Y2K downsizing) Orange, CA 08/98 – 11/99

Staff Engineer

Evaluated software and hardware problems in embedded systems for potential Y2K problems

Hughes Missile Systems Group, Tucson, AZ 03/97 – 10/97

Engineering Consultant (Successfully completed project)

Designed and successfully tested DRAM image frame controller FPGA using VHDL for Stinger Missile imaging applications. Designed and successfully tested memory buffer FPGA for Stinger Missile imaging applications using Altera's MAXPLUS II. Designed and successfully tested FPGA implementation of RISC microprocessor.

Positions prior to 1997 shall be furnished upon request


Engineer Degree (PhD without dissertation), University of Southern California (Device Physics),

inducted into Eta Kappa Knu (Electrical Engineering Honor Society)

MSCE, UCLA (Computer Architecture and Digital Signal Processing, M.S. Thesis in 2 Dimensional DSP)

BS, Mathematics (Computer Science Option), University California, Riverside, Phi Beta Kappa

Extension Courses at University of California, Irvine 2002 -2007

MATLAB for Engineers.

Digital Signal Processing with Field Programmable Gate Arrays: (Term Project: Design of 2 dimensional high pass filter for MPEG applications using TI Code Composer Studio 3.1 software using TI DSP system).

Extension Courses at University of California, San Diego 2002 -2016

Design using the 8051 and Assembly Language (Term Project: Design of system using the 8051 as a Frequency Counter with LCD for display).

Design using the 8051 and C Programming (Term Project: Interfacing the 8051 with a Hex Keyboard)

Design using the 8051, Assembly Language and C for real-time embedded applications

Term Project (Hardware and Software Implementation a 2 Level Interrupt System for Salt Water

Purification Plant)

Fundamentals of Digital Signal Processing

System Verilog for Verification of Digital Systems

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