| Distance: | Resume alert | Resumes 381 - 390 of 6075 |
C C++ Verification Engineer
Albuquerque, NM
... • HDL: System Verilog, Finite State machine, Assertions, Constraint Randomization, Functional Coverage, Bus Functional Models, OOPs, UVM, Testbench Environment • Static Time Analysis, Retiming, Advanced Modelling Issues, Hardware Arithmetic, Delays, ... - 2023 Sep 22
... • HDL: System Verilog, Finite State machine, Assertions, Constraint Randomization, Functional Coverage, Bus Functional Models, OOPs, UVM, Testbench Environment • Static Time Analysis, Retiming, Advanced Modelling Issues, Hardware Arithmetic, Delays, ... - 2023 Sep 22
C++ Verification Engineer
San Mateo, CA
... Good IP knowledge in some PHY blocks PCIe Familiar with VHDL, Verilog, familiar with VHDL, Verilog, C and C++, System Verilog, and assembly language and a python script. Sound knowledge in test cases, SOC simulation, and UVM methodology. Solid ... - 2023 Sep 21
... Good IP knowledge in some PHY blocks PCIe Familiar with VHDL, Verilog, familiar with VHDL, Verilog, C and C++, System Verilog, and assembly language and a python script. Sound knowledge in test cases, SOC simulation, and UVM methodology. Solid ... - 2023 Sep 21
High School C S
Hyderabad, Telangana, India
... Verilog HDL INTERNSHIP: Very Large Scale Integration from 01-03-2022 to30-04-2022 Internet of things from 01-06-2022 to31-07-2022 STRENGTHS: 1. Hard working 2.Possitive attitude 3.Quick learner 4.self motivated PERSONAL DOSSIER: NAME : A. kusuma ... - 2023 Sep 20
... Verilog HDL INTERNSHIP: Very Large Scale Integration from 01-03-2022 to30-04-2022 Internet of things from 01-06-2022 to31-07-2022 STRENGTHS: 1. Hard working 2.Possitive attitude 3.Quick learner 4.self motivated PERSONAL DOSSIER: NAME : A. kusuma ... - 2023 Sep 20
First Class Front End
Hyderabad, Telangana, India
... RTL Design using VHDL/Verilog. Synthesis and Simulation using Xilinx ISE, Vivado & Modelsim. RTL development, resolving system level challenges, architecting, implementing, and documenting using Verilog/VHDL concepts. The programming of FPGAs ... - 2023 Sep 19
... RTL Design using VHDL/Verilog. Synthesis and Simulation using Xilinx ISE, Vivado & Modelsim. RTL development, resolving system level challenges, architecting, implementing, and documenting using Verilog/VHDL concepts. The programming of FPGAs ... - 2023 Sep 19
Computer engineering, software engineering, electrical engineering
Mankato, MN
... PROJECTS & SKILLS VHDL and Verilog November 2022 ● Developed projects using VHDL and Verilog programming languages and FPGAs such as DE0-CV and DE1. ● Demonstrated skills in creating circuits including a seven-segment decoder, two-digit decimal ... - 2023 Sep 16
... PROJECTS & SKILLS VHDL and Verilog November 2022 ● Developed projects using VHDL and Verilog programming languages and FPGAs such as DE0-CV and DE1. ● Demonstrated skills in creating circuits including a seven-segment decoder, two-digit decimal ... - 2023 Sep 16
Computer/Software Engineer
Ames, IA
... Dean’s List 2023 ● Minor in Business SKILLS Programming Languages: Java, C/C++, C#, Python, HTML, CSS, JavaScript, Verilog, VHDL Technical Skills: Linux, Unity, Eclipse, Microsoft Visual Studio, VSCode, Cygwin, Model Sim, Quartus Prime, Code ... - 2023 Sep 13
... Dean’s List 2023 ● Minor in Business SKILLS Programming Languages: Java, C/C++, C#, Python, HTML, CSS, JavaScript, Verilog, VHDL Technical Skills: Linux, Unity, Eclipse, Microsoft Visual Studio, VSCode, Cygwin, Model Sim, Quartus Prime, Code ... - 2023 Sep 13
Data Analyst Software Engineering
Coolidge, AZ
... Skills • Programming/Assembly Languages: C#, MySQL, Java, Python, C, Aspen.Net, C++, Verilog, .Net, Bash, Prolog, XML, SQL, Excel, HTML. • Software: JIRA, PostgreSQL, Confluence, Git, MATLAB, Windows, Vivado, Microsoft SQL Server, Unity 3D, CAD, ... - 2023 Sep 11
... Skills • Programming/Assembly Languages: C#, MySQL, Java, Python, C, Aspen.Net, C++, Verilog, .Net, Bash, Prolog, XML, SQL, Excel, HTML. • Software: JIRA, PostgreSQL, Confluence, Git, MATLAB, Windows, Vivado, Microsoft SQL Server, Unity 3D, CAD, ... - 2023 Sep 11
Cadence and verilog hardware description language.
Bangalore, Karnataka, India
... INTERMEDIATE MPC GEETAM JUNIOR COLLEGE, KAKINADA INTERMEDIATE BOARD 2016- 2018 60% SSC CLASS X MOUNT CARMAL SCHOOL,KAKINADA SSC BOARD 2015- 2016 7.2(GPA) TECHNICAL SKILLS: • Programming Languages: C Language, Verilog Hardware description Language. ... - 2023 Sep 11
... INTERMEDIATE MPC GEETAM JUNIOR COLLEGE, KAKINADA INTERMEDIATE BOARD 2016- 2018 60% SSC CLASS X MOUNT CARMAL SCHOOL,KAKINADA SSC BOARD 2015- 2016 7.2(GPA) TECHNICAL SKILLS: • Programming Languages: C Language, Verilog Hardware description Language. ... - 2023 Sep 11
Verilog coding
Visakhapatnam, Andhra Pradesh, India
... 2016, visakhapatnam, 65% SKILLS verilog coding basics of c programming c++ Basics of java and python commuication skills problem solving team work can work under stressed conditions basic computer knowledge time management can handle cadence,linux. ... - 2023 Sep 11
... 2016, visakhapatnam, 65% SKILLS verilog coding basics of c programming c++ Basics of java and python commuication skills problem solving team work can work under stressed conditions basic computer knowledge time management can handle cadence,linux. ... - 2023 Sep 11
Control Systems Fpga Design
Visakhapatnam, Andhra Pradesh, India
... Secondary Education, AP 10th grade (2014) CGPA - 7.0 Specializations Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx ... - 2023 Sep 11
... Secondary Education, AP 10th grade (2014) CGPA - 7.0 Specializations Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx ... - 2023 Sep 11