Charles Patton

Dublin, CA

ad3zi1@r.postjobfree.com

www.linkedin.com/in/cfpattonjr

925-***-****

Post-Retirement Work Experience

Hardware Support Engineer, Arista Networks, Santa Clara, CA October 2022 to February 2023

Installation and maintenance of network switches in product development labs Field Service Engineer, Siemens Healthineers, Pleasanton, CA February 2022 to June 2022

Installation and maintenance of Atellica Immunoassay & Clinical Chemistry Analyzers Charles Patton

Dublin, CA

ad3zi1@r.postjobfree.com

www.linkedin.com/in/cfpattonjr

925-***-****

Pre-Retirement Work Experience

Lead Field Service Engineer, Cadence Design Systems, San Jose, CA December 2018 to April 2020

Field service of Palladium XP, Palladium Z1 and Protium X1 platforms Principal Technical Support Engineer, Oracle, Colorado Springs, CO March 2018 to June 2018

Automated Service Request tools development for SPARC and x86 servers Principal Hardware Engineer, Oracle, Santa Clara, CA January 2004 to September 2017

SPARC Server Development Lab Manager

Setup, managed, and maintained product development labs for SPARC servers over a span of 13 years where all Oracle-designed SPARC processors (T1, T2, T2+, T3, T4, T5, M5, M6, M7, M8, S1, and S2), host chipset ASICs and SPARC server systems were first powered on. debugged, and validated.

Managed engineers and technicians responsible for lab infrastructure:

• Installation, maintenance, upgrades of lab AC/DC power distribution including StarLine Track Busways, Plug-in power drop boxes, PDUs, power monitors

• Installation, maintenance of lab CRAC units

• Installation, configuration, maintenance of lab network infrastructure (switches, routers, copper & fiber optic cabling, patch panels)

• Installation, configuration, maintenance of lab support servers (files servers, storage appliances, console servers, OS jumpstart servers, VNC servers, web servers, TFTP servers, DHCP servers)

• Specification, installation, configuration, maintenance of lab test equipment including oscilloscopes, logic analyzers, signal generators, bench power supplies, protocol analyzers, chillers

For each new SPARC server development program, managed a team of engineers and technicians responsible for:

• Setup and support of open frame bench-top testbeds

• Rack and stack installation, configuration, maintenance of prototype servers

• Hardware system updates

• Firmware installation and updates

• OS installation and updates

• System hardware, firmware, and OS regression testing

• SPARC processor in-system characterization testing

• System configuration modifications including SPARC Processor replacements, DIMM swaps, PCIe card and driver installation, HDD/SSD/NVMe drives Senior Member of Technical Staff, Sun Microsystems, Menlo Park, CA July 1987 to December 2003

Hardware System and ASIC Design Engineer

• Graphics Accelerator ASICs for Sun Ultra Creator3D workstations, XVR-1000, and XVR-4000 graphics cards

• SBus to PCMCIA Bridge ASIC for SPARCstation Voyager and for SBus to PCMCIA host adapter card

• SBus to SBus Bridge ASIC for SBus expansion subsystem and host adapter card

• SBus to VME Bridge ASIC for embedded SPARC CPU VME board Hardware Design Engineer

SPARC-based Image Processing System for GE Medical Member of Technical Staff, SAXPY Computer Corp., Sunnyvale, CA July 1985 to June 1987

Hardware Design Engineer

• Floating Point Processor Pipeline Subsystem

• Data Cache Subsystem

• Clock Distribution Unit

Member of Technical Staff, International Imaging Systems, Milpitas, CA August 1982 to June 1985

Hardware Design Engineer

• Spatial Warper Unit

• Disk Controller and Data Storage Unit

Member of Technical Staff, Time and Space Processing, Santa Clara, CA March 1981 to July 1982

Hardware Design Engineer

Secure Voice Communication System

Member of Technical Staff, TRW Vidar, Mountain View, CA October 1978 to February 1981

Hardware Design Engineer

• CPU Subsystem for Central Office Telephone Switch

• SDN Subsystem for Central Office Telephone Switch Member of Technical Staff, Bell Laboratories, Holmdel, NJ June 1977 to September 1978

Systems Quality Engineer

Setup and maintained database to track AT&T Central Office hardware upgrades Education

MS Electrical Engineering

August 1977 to August 1978

Stanford University, Stanford, CA

BS Electrical Engineering

August 1973 to May 1977

University of Notre Dame, Notre Dame, IN

Skills

Unix/Solaris, Linux, Windows, CSH, BASH, Perl, Cadence Allegro, Verilog, Synopsys, 15+ years server hardware systems trouble shooting, hands-on use of test equipment including oscilloscopes, logic & protocol analyzers, multimeters.

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