| Resume alert | Resumes 51 - 60 of 142 |
Electrical Engineering
Frisco, TX
... Good working knowledge in Verilog HDL. Successfully developed RTL codes and testbenches for various modules in Xilinx. TECHNICAL SKILLS Tools: Xilinx ISE, Atmel AVR Studio (IDE), Arduino, Cadence (Virtuoso) Peripheral & Protocols: I2C, SPI, ADC, DAC ... - 2017 Mar 02
... Good working knowledge in Verilog HDL. Successfully developed RTL codes and testbenches for various modules in Xilinx. TECHNICAL SKILLS Tools: Xilinx ISE, Atmel AVR Studio (IDE), Arduino, Cadence (Virtuoso) Peripheral & Protocols: I2C, SPI, ADC, DAC ... - 2017 Mar 02
Wireless and Communications Engineer, RF Engineer
Richardson, TX
... --Microprocessor Systems---Digital Communication Systems TECHNICAL SKILLS Programming Languages: C, C++, Python, Verilog, VHDL, System Verilog, Programming R Engineering Tools: MATLAB, Labview, ModelSim, Spice, AWR VSS, AWR Microwave Office ... - 2017 Jan 26
... --Microprocessor Systems---Digital Communication Systems TECHNICAL SKILLS Programming Languages: C, C++, Python, Verilog, VHDL, System Verilog, Programming R Engineering Tools: MATLAB, Labview, ModelSim, Spice, AWR VSS, AWR Microwave Office ... - 2017 Jan 26
Engineering Electrical
Dallas, TX
... JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, Hyderabad, India April 2014 Bachelor of Technology in Electronics and Communication Engineering Technical Skills • Programming Languages: C, Verilog, VHDL, Java, Python • Engineering Tool: MATLAB, LabVIEW, ... - 2017 Jan 25
... JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, Hyderabad, India April 2014 Bachelor of Technology in Electronics and Communication Engineering Technical Skills • Programming Languages: C, Verilog, VHDL, Java, Python • Engineering Tool: MATLAB, LabVIEW, ... - 2017 Jan 25
Network Engineer
Dallas, TX
... Technology Ethernet, Frame relay, DSL, ISDN, MPLS Other Designing Tools MultiSim, OrCAD circuit designer, Microwind, MATLAB, Verilog, Labview, VMware Operating System Windows: 98/2000/XP/Vista/7/8/10, Server 2008/12, Cisco IOS, Ubuntu CERTIFICATIONS ... - 2017 Jan 19
... Technology Ethernet, Frame relay, DSL, ISDN, MPLS Other Designing Tools MultiSim, OrCAD circuit designer, Microwind, MATLAB, Verilog, Labview, VMware Operating System Windows: 98/2000/XP/Vista/7/8/10, Server 2008/12, Cisco IOS, Ubuntu CERTIFICATIONS ... - 2017 Jan 19
Senior application engineer
Dallas, TX
... Hardware description language: VHDL, VERILOG. IDE Programming tools: KEIL, MPLAB IDE, ANDROID STUDIO, MATLAB, LABVIEW, ARDUINO IDE, gEDA Schem and PCB, MODELSIM, XILINX. Communication Protocol: SPI, I2C, UART, USB Interface. Hardware (Worked On): ... - 2016 Dec 23
... Hardware description language: VHDL, VERILOG. IDE Programming tools: KEIL, MPLAB IDE, ANDROID STUDIO, MATLAB, LABVIEW, ARDUINO IDE, gEDA Schem and PCB, MODELSIM, XILINX. Communication Protocol: SPI, I2C, UART, USB Interface. Hardware (Worked On): ... - 2016 Dec 23
Electrical Technical Support
Garland, TX
... design Experience with schematic capture tools (Mentor DxDesigner or similar), VHDL/Verilog simulation tools (ModelSim or similar), and PCB layout tools Protective relay settings & coordination, and testing & commissioning technical support. ... - 2016 Oct 14
... design Experience with schematic capture tools (Mentor DxDesigner or similar), VHDL/Verilog simulation tools (ModelSim or similar), and PCB layout tools Protective relay settings & coordination, and testing & commissioning technical support. ... - 2016 Oct 14
Associate System Integration & Test Engineer
Dallas, TX
... Education B.S Electrical Engineering May 2015 The University of Texas at Dallas Projects VLSI Design, UT Dallas Design and arbitrary of a d-flip-flop circuit contain 250 cells by using Verilog. Use cadence to design and layout standard cells ... - 2016 Oct 10
... Education B.S Electrical Engineering May 2015 The University of Texas at Dallas Projects VLSI Design, UT Dallas Design and arbitrary of a d-flip-flop circuit contain 250 cells by using Verilog. Use cadence to design and layout standard cells ... - 2016 Oct 10
Sql Server Engineering
Plano, TX
... Jan 2010 -- Mar2012 TECHNICAL SKILLS UI and CMS: HTML/CSS, JavaScript, jQuery, WordPress, Weebly, Moodle (educational CMS), SharePoint Programming/development: C#, asp.NET, SQL server, VBA, Java, Swing, Oracle DB, C++, Verilog Tools: Puppet, Git, ... - 2016 Sep 20
... Jan 2010 -- Mar2012 TECHNICAL SKILLS UI and CMS: HTML/CSS, JavaScript, jQuery, WordPress, Weebly, Moodle (educational CMS), SharePoint Programming/development: C#, asp.NET, SQL server, VBA, Java, Swing, Oracle DB, C++, Verilog Tools: Puppet, Git, ... - 2016 Sep 20
Electrical Engineering Engineer
Garland, TX
... Software/Utilities: LabView, PSpice, Verilog, Matlab, Linux, CATIA V5, Arduino Microcontroller. Programming: Visual Studio, C++, Java, PCSpim. Other Skills Fluent in English and Spanish - 2016 Aug 15
... Software/Utilities: LabView, PSpice, Verilog, Matlab, Linux, CATIA V5, Arduino Microcontroller. Programming: Visual Studio, C++, Java, PCSpim. Other Skills Fluent in English and Spanish - 2016 Aug 15
Customer Service Electrical Engineering
Garland, TX
... Moderate usage of C, C++, Object Oriented Jave, AWR Microwave Office, PSpice, LTSpice, MATLAB, Verilog, Xilinx ISCE, AutoCAD, Solid Works Visual Studio, and Inventor including schematic design. Moderate Usage of tools such as DC Power Supply, ... - 2016 Jun 17
... Moderate usage of C, C++, Object Oriented Jave, AWR Microwave Office, PSpice, LTSpice, MATLAB, Verilog, Xilinx ISCE, AutoCAD, Solid Works Visual Studio, and Inventor including schematic design. Moderate Usage of tools such as DC Power Supply, ... - 2016 Jun 17