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Labview resumes in Santa Clara, CA

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C Software Engineer

Fremont, CA
... PIC24FJ256GB110, MSP430i4020 Digital Design: TTL, CMOS, and I/O interface, flash memory programming Software: VISUAL BASIC, LABVIEW, Verilog, HDL, Tcl/Tk and C/C++, PLC Product involved: IC Instruments, Hard Disk Drive, CD/DVD Certificate training: ... - 2017 Oct 11

Project Professional Experience

San Jose, CA
... • Tools: Cadence Virtuoso, Synopsys Primetime, Atom, VCS, ModelSim, Wireshark, LabVIEW. PROFESSIONAL EXPERIENCE ASIC Verification Trainee, Verifast Technologies, San Jose, CA Sept 2016 – June 2017 • Designed a filer based self-checking verification ... - 2017 Oct 09

Software Engineer Project

Santa Clara, CA
... Software Engineer Intern Oct 2013 - Jun 2014 ETA Technologies, Bangalore, India Executed 2 Projects and written the Control Software with Real Time Controls in NI LabView. • One Project was Performance characteristics of Automotive Clutches for ... - 2017 Oct 06

Project Manager Electrical Engineering

Campbell, CA
... Languages: French (native), Spanish (basic) Programming / Software Fortran 77-90, Matlab-Simulink, VBA, LabView, LaTeχ, Python, R, Tableau, KNIME, MySQL More information: https://fr.linkedin.com/in/william-maréchal-1203b821 Scholarship Refereed ... - 2017 Sep 22

Mechanical Engineer

Milpitas, CA, 95035
... non-linear FEA using ABAQUS, ANSYS and HyperWorks - Proficient in Data acquisition, LabVIEW, Matlab and adept in solving variety of engineering problems - Experience in using various sensors such as Accelerometer, Load Cell, Hall Effect sensor, etc. ... - 2017 Sep 06

Design Engineer

San Mateo, CA
... TIC, 10G SERDES), BB PLL, FM DPL, PDET/iCoupler, Temperature Sensor, FPGA/Firmware, Software/tools (Labview, Teststand, Pearl), Data processing–(Excel, Spotfire), PCB board design, MIMO. • Project/Product Management - Managing multiple projects / ... - 2017 Aug 17

Technician Engineer

San Jose, CA
... (Downconverters) Running LABVIEW program to balance the attenuators (adjust value of all attenuators) Making sure all the gain in the right level (- 3dB to 3Db) the best is zero (0dB) Checking all VCOS; LOS; and FPGA ICs to make sure they are ... - 2017 Aug 14

Design Test

Santa Clara, CA
... and compensating techniques Programming Languages: VHDL, Verilog, C, C++, Python, Embedded C, Assembly, MPI, OpenMP, LabVIEW Tools: Cadence (Spectre, Vituoso, SOC Encounter, ICFB), Synopsys Design Compiler, ModelSim, Xilinx Vivado/ISE, TINA-TI, ... - 2017 Aug 02

Test Engineering

Sunnyvale, CA
timoteo Torres “certified LabVIEW developer” 619-***-**** 676 Gail Av., Sunnyvale, CA 94086 ac1amp@r.postjobfree.com SUMMARY Electrical Engineer with more than 20 years of experience in the development, manufacturing and testing of high volume, low ... - 2017 Jul 13

Design Engineer

San Jose, CA
... Programming skills: C, C++, VHDL, Verilog, System Verilog, Embedded C, Assembly language, Perl Designing Tool: Cadence Virtuoso, Hspice, LabVIEW, MATLAB, Xilinx ISE, Vivado, Mentor Graphics ModelSim, Altera Quartus Other Computing skills: Data ... - 2017 Jul 03
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